[Intel-gfx] [PATCH 40/71] drm/i915/chv: Implement WaDisableSDEUnitClockGating:chv
ville.syrjala at linux.intel.com
ville.syrjala at linux.intel.com
Wed Apr 9 12:28:38 CEST 2014
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index de9510e..468fe37 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5401,6 +5401,10 @@ static void cherryview_init_clock_gating(struct drm_device *dev)
/* WaDisableCSUnitClockGating:chv */
I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |
GEN6_CSUNIT_CLOCK_GATE_DISABLE);
+
+ /* WaDisableSDEUnitClockGating:chv */
+ I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
+ GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
}
static void g4x_init_clock_gating(struct drm_device *dev)
--
1.8.3.2
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