[Intel-gfx] [PATCH 0/7] Updated MIPI sequence for BYT

Daniel Vetter daniel at ffwll.ch
Wed Apr 9 16:51:56 CEST 2014


On Wed, Apr 09, 2014 at 01:59:29PM +0530, Shobhit Kumar wrote:
> Hi,
> The changes in DSI sequence are as suggested by HW and SV teams. Notable
> difference apart form few WAs is that for MIPI it is suggetsed that the
> PORT is enabled before PIPE and PLANE. The patch makes these changes.
> So few sequence changes, few workarounds and few new feature support like
> Clockstop.
> 
> A generic panel driver to enable MIPI is planned in next patchset
> 
> Known issue - 
> Today the upstream kernel does not have PMIC driver amd these patches works if 
> UEFI BIOS enables MIPI and reuse  BKL_EN, PANEL_EN from there, but during
> suspend/resume things will still fail.

Thanks a lot for the patches&review, looking forward to the next round.
Hopefully that one will fix our mipi/dsi code to Just Work (tm) so that we
can close the asus 100t bug on kernel.org:

https://bugzilla.kernel.org/show_bug.cgi?id=68451

Cheers, Daniel
> 
> Regards
> Shobhit
> 
> Shobhit Kumar (7):
>   drm/i915: Program Rcomp and band gap reset everytime we resume from power gate
>   drm/i915: Enable MIPI port before the plane and pipe enable
>   drm/i915: Disable DPOunit clock gating
>   drm/i915: Parameterize the Clockstop and escape_clk_div
>   drm/i915: Panel commands can be sent only when clock is in LP11
>   drm/i915: Send DPI command explicitely in LP mode
>   drm/i915: Enable RANDOM resolution support for MIPI panels
> 
>  drivers/gpu/drm/i915/intel_dsi.c     | 125 +++++++++++++++++++++++++++--------
>  drivers/gpu/drm/i915/intel_dsi.h     |   4 +-
>  drivers/gpu/drm/i915/intel_dsi_cmd.c |   4 +-
>  drivers/gpu/drm/i915/intel_dsi_cmd.h |   5 +-
>  4 files changed, 108 insertions(+), 30 deletions(-)
> 
> -- 
> 1.8.3.2
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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