[Intel-gfx] [PATCH] tests/gen7_forcewake_mt: Don't set the GGTT bit in SRM command

[Volkin, Bradley D]

On Tue, Apr 08, 2014 at 11:20:30PM -0700, Chris Wilson wrote:
> On Tue, Apr 08, 2014 at 02:22:16PM -0700, bradley.d.volkin at intel.com wrote:
> > From: Brad Volkin <bradley.d.volkin at intel.com>
> > 
> > The command parser in newer kernels will reject it and setting this
> > bit is not required for the actual test case.
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76670
> > Signed-off-by: Brad Volkin <bradley.d.volkin at intel.com>
> 
> This was written how I did in the ddx...

Oh, I thought you had said that the ddx didn't use MI_STORE_REGISTER_MEM, and
I didn't see it used in the current ddx code, so I thought that part of the
test wasn't relevant to the actual workaround. It looked like it was just a
write so we could see the values and check that they were updated. But if it
is, then yeah, I don't want to change the test behavior.

Brad

> -Chris
> 
> -- 
> Chris Wilson, Intel Open Source Technology Centre