[Intel-gfx] [PATCH 52/71] drm/i915/chv: Make CHV irq handler loop until all interrupts are consumed
Daniel Vetter
daniel at ffwll.ch
Wed Apr 9 18:05:01 CEST 2014
On Wed, Apr 09, 2014 at 01:28:50PM +0300, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Really, this is what the hw guys tell us to do? I mean we've never had a
gmch based platform which didn't need this, but I've thought with all the
gen8 irq restructuring they'd finally fix this ...
/me cries
Cheers, Daniel
> ---
> drivers/gpu/drm/i915/i915_irq.c | 29 ++++++++++++++---------------
> 1 file changed, 14 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 9702fde..fc9b7e6 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1775,30 +1775,29 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
> u32 master_ctl, iir;
> irqreturn_t ret = IRQ_NONE;
>
> - master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~DE_MASTER_IRQ_CONTROL;
> - iir = I915_READ(VLV_IIR);
> + for (;;) {
> + master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL;
> + iir = I915_READ(VLV_IIR);
>
> - if (master_ctl == 0 && iir == 0)
> - return IRQ_NONE;
> + if (master_ctl == 0 && iir == 0)
> + break;
>
> - I915_WRITE(GEN8_MASTER_IRQ, 0);
> + I915_WRITE(GEN8_MASTER_IRQ, 0);
>
> - gen8_gt_irq_handler(dev, dev_priv, master_ctl);
> + gen8_gt_irq_handler(dev, dev_priv, master_ctl);
>
> - valleyview_pipestat_irq_handler(dev, iir);
> + valleyview_pipestat_irq_handler(dev, iir);
>
> - /* Consume port. Then clear IIR or we'll miss events */
> - if (iir & I915_DISPLAY_PORT_INTERRUPT) {
> + /* Consume port. Then clear IIR or we'll miss events */
> i9xx_hpd_irq_handler(dev, iir);
> - ret = IRQ_HANDLED;
> - }
>
> - I915_WRITE(VLV_IIR, iir);
> + I915_WRITE(VLV_IIR, iir);
>
> - I915_WRITE(GEN8_MASTER_IRQ, DE_MASTER_IRQ_CONTROL);
> - POSTING_READ(GEN8_MASTER_IRQ);
> + I915_WRITE(GEN8_MASTER_IRQ, DE_MASTER_IRQ_CONTROL);
> + POSTING_READ(GEN8_MASTER_IRQ);
>
> - ret = IRQ_HANDLED;
> + ret = IRQ_HANDLED;
> + }
>
> return ret;
> }
> --
> 1.8.3.2
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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