[Intel-gfx] [PATCH] [v2] drm/i915/bdw: Add 42ms delay for IPS disable

[Runyan, Arthur J]

Ben explained some of the fine details of the code to me, and I'm happy.
Reviewed-by: Art Runyan <arthur.j.runyan at intel.com>

>
>From: Ben Widawsky <benjamin.widawsky at linux.intel.com>
>
>This is a requirement added to the spec. This patch will prevent
>persistent corruption on the display.
>
>v2: Make the wait before the vblank wait. (Art)
>Try to finish early by polling the register
>s/present/prevent (Chris)
>
>Cc: Art Runyan <arthur.j.runyan at intel.com>
>Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
>---
> drivers/gpu/drm/i915/intel_display.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index 7f02444..05c60b1 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -3583,10 +3583,13 @@ void hsw_disable_ips(struct intel_crtc *crtc)
> 		return;
>
> 	assert_plane_enabled(dev_priv, crtc->plane);
>-	if (IS_BROADWELL(crtc->base.dev)) {
>+	if (IS_BROADWELL(dev)) {
> 		mutex_lock(&dev_priv->rps.hw_lock);
> 		WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL,
>0));
> 		mutex_unlock(&dev_priv->rps.hw_lock);
>+		/* wait for pcode to finish disabling IPS, which may take up to 42ms */
>+		if (wait_for((I915_READ(IPS_CTL) & IPS_ENABLE) == 0, 42))
>+			DRM_DEBUG_KMS("Timed out waiting for IPS disable\n");
> 	} else {
> 		I915_WRITE(IPS_CTL, 0);
> 		POSTING_READ(IPS_CTL);
>--
>1.9.1