[Intel-gfx] linux-next: manual merge of the drm-intel tree with the tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/i915_gem_context.c between commit 691e6415c891
("drm/i915: Always use kref tracking for all contexts") from the
drm-intel-fixes tree and commit ad2ac08bf34b ("drm/i915: Make contexts
non-snooped on non-LLC platforms") from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr at canb.auug.org.au

diff --cc drivers/gpu/drm/i915/i915_gem_context.c
index d72db15afa02,30b355afb362..000000000000
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@@ -231,32 -232,40 +231,40 @@@ __create_hw_context(struct drm_device *
  		return ERR_PTR(-ENOMEM);
  
  	kref_init(&ctx->ref);
 -	ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
 -	INIT_LIST_HEAD(&ctx->link);
 -	if (ctx->obj == NULL) {
 -		kfree(ctx);
 -		DRM_DEBUG_DRIVER("Context object allocated failed\n");
 -		return ERR_PTR(-ENOMEM);
 -	}
 +	list_add_tail(&ctx->link, &dev_priv->context_list);
  
 -	/*
 -	 * Try to make the context utilize L3 as well as LLC.
 -	 *
 -	 * On VLV we don't have L3 controls in the PTEs so we
 -	 * shouldn't touch the cache level, especially as that
 -	 * would make the object snooped which might have a
 -	 * negative performance impact.
 -	 */
 -	if (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev)) {
 -		ret = i915_gem_object_set_cache_level(ctx->obj,
 -						      I915_CACHE_L3_LLC);
 -		/* Failure shouldn't ever happen this early */
 -		if (WARN_ON(ret))
 +	if (dev_priv->hw_context_size) {
 +		ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
 +		if (ctx->obj == NULL) {
 +			ret = -ENOMEM;
  			goto err_out;
 -	}
 +		}
  
- 		if (INTEL_INFO(dev)->gen >= 7) {
 -	list_add_tail(&ctx->link, &dev_priv->context_list);
++		/*
++		 * Try to make the context utilize L3 as well as LLC.
++		 *
++		 * On VLV we don't have L3 controls in the PTEs so we
++		 * shouldn't touch the cache level, especially as that
++		 * would make the object snooped which might have a
++		 * negative performance impact.
++		 */
++		if (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev)) {
 +			ret = i915_gem_object_set_cache_level(ctx->obj,
 +							      I915_CACHE_L3_LLC);
 +			/* Failure shouldn't ever happen this early */
 +			if (WARN_ON(ret))
 +				goto err_out;
 +		}
 +	}
  
  	/* Default context will never have a file_priv */
 -	if (file_priv == NULL)
 -		return ctx;
 -
 -	ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID, 0,
 -			GFP_KERNEL);
 -	if (ret < 0)
 -		goto err_out;
 +	if (file_priv != NULL) {
 +		ret = idr_alloc(&file_priv->context_idr, ctx,
 +				DEFAULT_CONTEXT_ID, 0, GFP_KERNEL);
 +		if (ret < 0)
 +			goto err_out;
 +	} else
 +		ret = DEFAULT_CONTEXT_ID;
  
  	ctx->file_priv = file_priv;
  	ctx->id = ret;
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