[Intel-gfx] [RFC 0/3] render state initialization (bdw rc6)

[Chris Wilson]

On Tue, Apr 22, 2014 at 08:19:41PM +0300, Mika Kuoppala wrote:
> Hi,
> 
> Here are patches to initialize first render context to a hopefully, 
> valid state. If pipeline/context is not initialized and we enter rc6 on bdw,
> the render ring can hung on the first batch submitted. That is atleast
> the hypothesis this work is based on.
> 
> The states are stripped from rendercopy_genX's from i-g-t/lib and
> the state generators are part of i-g-t also. The states are
> propably overshoot from what can be consider the minimal valid
> (null) state on the pipeline. I just initialized everything rendercopy
> does and haven't really put effort on optimizing the state until
> I get some test results that this indeed solves anything.
> 
> The state generators can be found here but they are not needed for testing.
> http://cgit.freedesktop.org/~miku/intel-gpu-tools/log/?h=null_state_gen
> 
> Gen7 and Gen8 seems to atleast survive the boot but Gen6 is totally
> untested.
> 
> Here is the branch for testing:
> http://cgit.freedesktop.org/~miku/drm-intel/log/?h=render_state
> 
> I am interested to know if these patches make matters better/worse for those
> who have issues with first batch hanging on bdw, but as always, any feedback
> is greatly appreciated.
> 
> Mika Kuoppala (3):
>   drm/i915: export vmap_batch from command parser
It's only a single page, it does not need to be vmapped.

>   drm/i915: add render state initialization
>   drm/i915: add null render states for gen6, gen7 and gen8

I still don't buy that this is anything more than papering over a
problem. The state you load into the context is invalid as soon as it is
executed, which may lead to problems, we don't know since the problem is
not being discussed, and it will certainly be more explicit if the right
bits are poked into the context directly to keep the hw from falling over.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre