[Intel-gfx] [PATCH] drm/i915: Use hash tables for the command parser
Daniel Vetter
daniel at ffwll.ch
Mon Apr 28 18:11:01 CEST 2014
On Mon, Apr 28, 2014 at 6:07 PM, Volkin, Bradley D
<bradley.d.volkin at intel.com> wrote:
> On Mon, Apr 28, 2014 at 08:53:30AM -0700, Daniel Vetter wrote:
>> On Mon, Apr 28, 2014 at 08:22:08AM -0700, bradley.d.volkin at intel.com wrote:
>> > From: Brad Volkin <bradley.d.volkin at intel.com>
>> >
>> > For clients that submit large batch buffers the command parser has
>> > a substantial impact on performance. On my HSW ULT system performance
>> > drops as much as ~20% on some tests. Most of the time is spent in the
>> > command lookup code. Converting that from the current naive search to
>> > a hash table lookup reduces the performance impact by as much as ~10%.
>> >
>> > The choice of value for I915_CMD_HASH_ORDER allows all commands
>> > currently used in the parser tables to hash to their own bucket (except
>> > for one collision on the render ring). The tradeoff is that it wastes
>> > memory. Because the opcodes for the commands in the tables are not
>> > particularly well distributed, reducing the order still leaves many
>> > buckets empty. The increased collisions don't seem to have a huge
>> > impact on the performance gain, but for now anyhow, the parser trades
>> > memory for performance.
>>
>> For the collisions have you looked into pre-munging the key a bit so that
>> we use more bits? A few shifts and xors shouldn't affect perf much really.
>
> I looked at this briefly but didn't find a substantial improvement. The
> basic patch improved things enough that I wanted to just get it out. I
> can look into this more, but I'd like to think about implementing the
> batch buffer copy portion next. I don't want to optimize this, make people
> happy, and then introduce another perf drop from the copy. Better to just
> take the full hit now and then continue the improvements. Sound reasonable?
Yeah, makes sense. Like I've said just throwing around ideas.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
More information about the Intel-gfx
mailing list