[Intel-gfx] [PATCH] drm/i915/bdw: Use timeout mode for RC6 on bdw

[Ben Widawsky]

On Wed, Apr 09, 2014 at 11:44:06AM -0700, Tom O'Rourke wrote:
> Higher RC6 residency is observed using timeout mode
> instead of EI mode.  This applies to Broadwell only.
> The difference is particularly noticeable with video
> playback.
> 
> Issue: VIZ-3778
> Change-Id: I62bb12e21caf19651034826b45cde7f73a80938d
> Signed-off-by: Tom O'Rourke <Tom.O'Rourke at intel.com>

I've merged this one to my bdw-rc6 branch, and therefore my broadwell
branch. Hopefully Kristen will see some improvement.

> ---
>  drivers/gpu/drm/i915/intel_pm.c |   16 ++++++++++++----
>  1 file changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 33b2592..0d63abf 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3335,15 +3335,23 @@ static void gen8_enable_rps(struct drm_device *dev)
>  	for_each_ring(ring, dev_priv, unused)
>  		I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
>  	I915_WRITE(GEN6_RC_SLEEP, 0);
> -	I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */
> +	if (IS_BROADWELL(dev))
> +		I915_WRITE(GEN6_RC6_THRESHOLD, 625); /* 800us/1.28 for TO */
> +	else
> +		I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */
>  
>  	/* 3: Enable RC6 */
>  	if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
>  		rc6_mask = GEN6_RC_CTL_RC6_ENABLE;
>  	intel_print_rc6_info(dev, rc6_mask);
> -	I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE |
> -				    GEN6_RC_CTL_EI_MODE(1) |
> -				    rc6_mask);
> +	if (IS_BROADWELL(dev))
> +		I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE |
> +				GEN7_RC_CTL_TO_MODE |
> +				rc6_mask);
> +	else
> +		I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE |
> +				GEN6_RC_CTL_EI_MODE(1) |
> +				rc6_mask);
>  
>  	/* 4 Program defaults and thresholds for RPS*/
>  	I915_WRITE(GEN6_RPNSWREQ,
> -- 
> 1.7.9.5
> 
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-- 
Ben Widawsky, Intel Open Source Technology Center