[Intel-gfx] [PATCH 5/7] drm/i915: avoid emiting semaphore wait on GEN8 when seqno wrap happened.

[Rodrigo Vivi]

C: Ben Widawsky <ben at bwidawsk.net>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 30 +++++++++++++++++++++---------
 1 file changed, 21 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2e566e0..cd30b39 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -867,15 +867,26 @@ gen8_ring_sync(struct intel_engine_cs *waiter,
 	if (ret)
 		return ret;
 
-	intel_ring_emit(waiter, MI_SEMAPHORE_WAIT |
-				MI_SEMAPHORE_GLOBAL_GTT |
-				MI_SEMAPHORE_POLL |
-				MI_SEMAPHORE_SAD_GTE_SDD);
-	intel_ring_emit(waiter, seqno);
-	intel_ring_emit(waiter,
-			lower_32_bits(GEN8_WAIT_OFFSET(waiter, signaller->id)));
-	intel_ring_emit(waiter,
-			upper_32_bits(GEN8_WAIT_OFFSET(waiter, signaller->id)));
+	/* If seqno wrap happened, omit the wait with no-ops */
+	if (likely(!i915_gem_has_seqno_wrapped(waiter->dev, seqno))) {
+		intel_ring_emit(waiter, MI_SEMAPHORE_WAIT |
+					MI_SEMAPHORE_GLOBAL_GTT |
+					MI_SEMAPHORE_POLL |
+					MI_SEMAPHORE_SAD_GTE_SDD);
+		intel_ring_emit(waiter, seqno);
+		intel_ring_emit(waiter,
+				lower_32_bits(GEN8_WAIT_OFFSET(waiter,
+							       signaller->id)));
+		intel_ring_emit(waiter,
+				upper_32_bits(GEN8_WAIT_OFFSET(waiter,
+							       signaller->id)));
+	} else {
+		intel_ring_emit(waiter, MI_NOOP);
+		intel_ring_emit(waiter, MI_NOOP);
+		intel_ring_emit(waiter, MI_NOOP);
+		intel_ring_emit(waiter, MI_NOOP);
+	}
+
 	intel_ring_advance(waiter);
 	return 0;
 }
@@ -2572,6 +2583,7 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
 			ring->semaphore.mbox.signal[BCS] = GEN6_BVESYNC;
 			ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC;
 			ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;
+
 		}
 	}
 	ring->init = init_ring_common;
-- 
1.9.3