[Intel-gfx] [PATCH] drm/i915: Android sync points for i915 v2

[Daniel Vetter]

On Tue, Aug 5, 2014 at 7:09 PM, Jesse Barnes <jbarnes at virtuousgeek.org> wrote:
>> >> >> Then we need similar flags for vblank events and pageflips to do the
>> >> >> same (obviously those are drm core patches) and it's all there. That
>> >> >> should probably integrated as a special type of drm_event, so that
>> >> >> drivers don't need to change a single line of code.
>> >> >
>> >> > Except for actually using the fences...
>> >>
>> >> Actually no, nothing needed - drivers already signal drm_events in all
>> >> the right places, so we really only need to change
>> >> drm_send_vblank_event. And ofc we need to rework the code in the
>> >> pageflip/atomic/vblank_wait ioctl code in the drm core to create a
>> >> fence (and return it to userspace) instead of a normal drm event.
>> >
>> > Actually yes.  You get back a fence object and want to do something
>> > with it, right?  That means new code.  Plus modifying current execbuf
>> > users that want fences to pass in a flag.
>>
>> This comment was specifically about vblank and pageflips, _not_ about
>> execbuf. At least that's been what I've thought while writing the
>> original mail and reading your reply. Looks like we have a
>> misunderstanding here. Since for vblank and pageflip we really can do
>> it all in the drm core.
>
> I was thinking of userspace drivers and userspace, not kernel
> internals...  that's the disconnect.

Ah yeah, userspace needs to be adjusted of course to use fences as
flip completion events instead of drm events received through the drm
fd. But if we have a generic kms userspace (android hwc or wayland or
whatever) that part shouldn't have any driver-specific logic either.
And I've thought hwc expects fences for flip completion so that it
knows when it can start to reuse buffers and render into them again.
So at least on Android I think we need this, and I guess wayland
wouldn't mind if it could deal with fences exclusively.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch