[Intel-gfx] [PATCH 14/15] drm/i915: capture_reg_state interrupt registers for Gen8
Daniel Vetter
daniel at ffwll.ch
Wed Aug 6 10:27:51 CEST 2014
On Tue, Aug 05, 2014 at 07:51:25AM -0700, Rodrigo Vivi wrote:
> From: Michel Thierry <michel.thierry at intel.com>
>
> After unclaimed register detection was enabled for BDW, I started seeing
> warnings while reading registers 0x4400c (DEIER) and 0x4401c (GTIER).
>
> From Gen8, DEIER has been split per display engine pipe, and GTIER has
> been split in 4.
>
> Signed-off-by: Michel Thierry <michel.thierry at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Isn't that now addressed by the other gt/deier patches from you?
-Daniel
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
> drivers/gpu/drm/i915/i915_gpu_error.c | 19 ++++++++++++++++++-
> 2 files changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 67e9da0..6622a53 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -314,6 +314,8 @@ struct drm_i915_error_state {
> u32 eir;
> u32 pgtbl_er;
> u32 ier;
> + u32 pipe_ier[I915_MAX_PIPES]; /* gen8 */
> + u32 gt_ier[4]; /* gen8 */
> u32 ccid;
> u32 derrmr;
> u32 forcewake;
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 0b3f694..e7a4ae0 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -380,6 +380,16 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
> if (INTEL_INFO(dev)->gen == 7)
> err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
>
> + if (INTEL_INFO(dev)->gen == 8) {
> + for (i = 0; i < ARRAY_SIZE(error->pipe_ier); i++)
> + err_printf(m, "PIPE_IER_%d: 0x%08x\n", i,
> + error->pipe_ier[i]);
> +
> + for (i = 0; i < ARRAY_SIZE(error->gt_ier); i++)
> + err_printf(m, "GT_IER_%d: 0x%08x\n", i,
> + error->gt_ier[i]);
> + }
> +
> for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
> err_printf(m, "%s command stream:\n", ring_str(i));
> i915_ring_error_state(m, dev, &error->ring[i]);
> @@ -1091,6 +1101,7 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
> struct drm_i915_error_state *error)
> {
> struct drm_device *dev = dev_priv->dev;
> + int i, pipe;
>
> /* General organization
> * 1. Registers specific to a single generation
> @@ -1135,7 +1146,13 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
> if (HAS_HW_CONTEXTS(dev))
> error->ccid = I915_READ(CCID);
>
> - if (HAS_PCH_SPLIT(dev))
> + if (IS_GEN8(dev)) {
> + for_each_pipe(pipe)
> + error->pipe_ier[pipe] =
> + I915_READ(GEN8_DE_PIPE_IER(pipe));
> + for (i = 0; i < 4; i++)
> + error->gt_ier[i] = I915_READ(GEN8_GT_IER(i));
> + } else if (HAS_PCH_SPLIT(dev))
> error->ier = I915_READ(DEIER) | I915_READ(GTIER);
> else {
> if (IS_GEN2(dev))
> --
> 1.9.3
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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