[Intel-gfx] Responsiveness Changes to i915 Driver

Chris Wilson chris at chris-wilson.co.uk
Wed Aug 20 20:12:49 CEST 2014


On Wed, Aug 20, 2014 at 06:03:52PM +0000, Wilde, Martin wrote:
> Hi Jani - the DRM_DEBUG_KMS is part of the DRM_DEBUG_CODE preprocessor
> macro and thus not available unavailable in a non-debug build kernel from
> my understanding.
> 
> The issue we have seen many times is that the BIOS (firmware) team does
> not set the T3 value correctly in the VBT table of the BIOS (or they use
> the VESA default of 200ms and the panel is really a 50ms panel) and thus
> there is no way to quickly determine what value was set unless you build a
> debug kernel version that is typically beyond the scope of the BIOS team
> (we have also had problems tracking down who in the BIOS team made the
> setting).  For example in the latest Coreboot firmware for Rambi
> Chromebook, someone set the VBT T3 value to 500 instead of 200.  This was
> not detected until I ran the S3 resume test and noticed the S3 resume time
> was 300ms too long.  Having the INFO message available in dmesg output
> allowed me to quickly see the value was set wrong and address it without
> having to do a debug build or do debugging to find the issue. Additionally
> having the INFO message can be used by the firmware team to verify their
> setting is correct.  We are also asking the Windows Gfx driver to do the
> same as it happens more frequently than we thought.  Until we have fully
> implemented HDP detection in the drivers, this issue will continue
> happening.
> 
> So the request is to expose this as an INFO message to allow quick
> detection/verification of correct setting as VBT settings can be set
> in-correctly in a firmware update and not easily detected without special
> kernel builds.  This allows the QA team to track platform settings that
> effect the responsive time of mobile platforms.
> 
> Let me know if you have further questions and thanks for feedback

I would suggest a /debugfs/.../i915_panel_capabilities and/or
i915_vbt_capabilites.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre



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