[Intel-gfx] [PATCH] drm/i915/ilk: special case enabling of PCU_EVENT interrupt

Jesse Barnes jbarnes at virtuousgeek.org
Tue Aug 26 01:24:55 CEST 2014


This happens in irq_postinstall before we've set the pm._irqs_disabled flag,
but shouldn't warn.  So add a nowarn variant to allow this to happen w/o
a backtrace and keep the rest of the IRQ tracking code happy.

Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_irq.c |   18 ++++++++++++------
 1 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index d5445e7..ec1d9fe 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -132,6 +132,16 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */
 
 /* For display hotplug interrupt */
 static void
+ironlake_enable_display_irq_nowarn(struct drm_i915_private *dev_priv, u32 mask)
+{
+	if ((dev_priv->irq_mask & mask) != 0) {
+		dev_priv->irq_mask &= ~mask;
+		I915_WRITE(DEIMR, dev_priv->irq_mask);
+		POSTING_READ(DEIMR);
+	}
+}
+
+static void
 ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
 {
 	assert_spin_locked(&dev_priv->irq_lock);
@@ -139,11 +149,7 @@ ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
 	if (WARN_ON(!intel_irqs_enabled(dev_priv)))
 		return;
 
-	if ((dev_priv->irq_mask & mask) != 0) {
-		dev_priv->irq_mask &= ~mask;
-		I915_WRITE(DEIMR, dev_priv->irq_mask);
-		POSTING_READ(DEIMR);
-	}
+	ironlake_enable_display_irq_nowarn(dev_priv, mask);
 }
 
 static void
@@ -3665,7 +3671,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
 		 * setup is guaranteed to run in single-threaded context. But we
 		 * need it to make the assert_spin_locked happy. */
 		spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-		ironlake_enable_display_irq(dev_priv, DE_PCU_EVENT);
+		ironlake_enable_display_irq_nowarn(dev_priv, DE_PCU_EVENT);
 		spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 	}
 
-- 
1.7.5.4




More information about the Intel-gfx mailing list