[Intel-gfx] [PATCH] drm/i915: FBC flush nuke for BDW
Rodrigo Vivi
rodrigo.vivi at gmail.com
Tue Aug 26 20:38:28 CEST 2014
On Tue, Aug 26, 2014 at 12:54 AM, Daniel Vetter <daniel at ffwll.ch> wrote:
> On Tue, Aug 26, 2014 at 2:39 AM, Rodrigo Vivi <rodrigo.vivi at gmail.com>
> wrote:
> > So I prefer to continue using the HW/ring version we have already working
> > for HSW and merge this v3 to get FBC working at BDW.
>
> Well for that we first need to fix up the psr testcase. I really want that.
>
fbc and psr are independend features and tasks prioritization should come
from managers and program managers, right?!
>
> And then I also want fbc enabled by default, which means you need to
> rebase/review Ville's patch series to make that work.
>
We have FBC working with issues and protected by parameter on all
platforms. On BDW there is no fbc at all. This patch makes FBC state at
least go to the same level as we already have FBC working on all other
platforms.
I don't see a dependency here between this fix and the big FBC rework-fix.
This patch isn't enabling FBC by default. But allowing people that want and
need to use FBC.
>
> Also I really think the fb frontbuffer tracking can be made to work
> for fbc - if you do it right you should actually end up with fewer
> frontbuffer flushes than what we currently do by submitting them
> through rings.
> -Daniel
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
>
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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