[Intel-gfx] [PATCH 1/2] drm/i915: Don't dereference fb when disabling primary plane

[ville.syrjala at linux.intel.com]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

During driver init we may not have a valid framebuffer for the primary
plane even though the plane is enabled due to failed BIOS fb takeover.
This means we have to avoid dereferencing the fb in
.update_primary_plane() when disabling the plane.

The introduction of the primary plane rotation in

 commit d91a2cb8e5104233c02bbde539bd4ee455ec12ac
 Author: Sonika Jindal <sonika.jindal at intel.com>
 Date:   Fri Aug 22 14:06:04 2014 +0530

    drm/i915: Add 180 degree primary plane rotation support

caused a regression by trying to look up the pixel format before we can
be sure there's a valid fb available. This isn't entirely unsurprising
since the rotation patches originally predate the change to the primary
plane code that calls .update_primary_plane() also when disabling the
plane:

 commit fdd508a6419217cce28213f3c9bd27c02a0d4c71
 Author: Ville Syrjälä <ville.syrjala at linux.intel.com>
 Date:   Fri Aug 8 21:51:11 2014 +0300

    drm/i915: Call .update_primary_plane in intel_{enable,
    disable}_primary_hw_plane()

Cc: Sonika Jindal <sonika.jindal at intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 16ac5ae..d5ba1f6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2393,8 +2393,6 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
 	u32 reg = DSPCNTR(plane);
 	int pixel_size;
 
-	pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
-
 	if (!intel_crtc->primary_enabled) {
 		I915_WRITE(reg, 0);
 		if (INTEL_INFO(dev)->gen >= 4)
@@ -2405,6 +2403,8 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
 		return;
 	}
 
+	pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
+
 	dspcntr = DISPPLANE_GAMMA_ENABLE;
 
 	dspcntr |= DISPLAY_PLANE_ENABLE;
@@ -2515,8 +2515,6 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
 	u32 reg = DSPCNTR(plane);
 	int pixel_size;
 
-	pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
-
 	if (!intel_crtc->primary_enabled) {
 		I915_WRITE(reg, 0);
 		I915_WRITE(DSPSURF(plane), 0);
@@ -2524,6 +2522,8 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
 		return;
 	}
 
+	pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
+
 	dspcntr = DISPPLANE_GAMMA_ENABLE;
 
 	dspcntr |= DISPLAY_PLANE_ENABLE;
-- 
1.8.5.5