[Intel-gfx] [PATCH 2/2] drm/i915: VLV/CHV PSR: Increase wait delay time before active PSR.

[Rodrigo Vivi]

Since active function on VLV immediately activate PSR let's give more
time for idleness.

v2: Rebase over intel_psr.c and fix typo.
v3: Revival: Manual tests indicated that this is needed. With a short delay there is a huge
    risk of getting blank screens when planes are being enabled.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Reviewed-by: Durgadoss R <durgadoss.r at intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index afb8b8c..a6028b6 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -597,6 +597,12 @@ void intel_psr_flush(struct drm_device *dev,
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct drm_crtc *crtc;
 	enum pipe pipe;
+	/* On HSW/BDW Hardware controls idle_frames to go to PSR entry state
+	 * However on VLV we go to PSR active state with psr work. So let's
+	 * wait more time. The main reason is to give more time when primary
+	 * plane is getting enabled avoiding blank screens.
+	 */
+	int delay = msecs_to_jiffies(HAS_DDI(dev) ? 100 : 5000);
 
 	mutex_lock(&dev_priv->psr.lock);
 	if (!dev_priv->psr.enabled) {
@@ -629,7 +635,7 @@ void intel_psr_flush(struct drm_device *dev,
 
 	if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)
 		schedule_delayed_work(&dev_priv->psr.work,
-				      msecs_to_jiffies(100));
+				      msecs_to_jiffies(delay));
 	mutex_unlock(&dev_priv->psr.lock);
 }
 
-- 
1.9.3