[Intel-gfx] [PATCH 1/4] drm/i915: Use DSI Pll1 for enabling MIPI DSI on Port C

[Jani Nikula]

On Tue, 09 Dec 2014, Gaurav K Singh <gaurav.k.singh at intel.com> wrote:
> DSI Pll1 is used for enabling DSI on Port C.
>
> v2: Addressed review comments of Jani
>     - Used & operator instead of == for intel_dsi->ports
>
> Signed-off-by: Gaurav K Singh <gaurav.k.singh at intel.com>

Reviewed-by: Jani Nikula <jani.nikula at intel.com>


> ---
>  drivers/gpu/drm/i915/intel_dsi_pll.c |    5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index 8957f10..3622d0b 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -241,9 +241,10 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder)
>  		return;
>  	}
>  
> -	dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL;
> +	if (intel_dsi->ports & (1 << PORT_A))
> +		dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL;
>  
> -	if (intel_dsi->dual_link)
> +	if (intel_dsi->ports & (1 << PORT_C))
>  		dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL;
>  
>  	DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n",
> -- 
> 1.7.9.5
>
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-- 
Jani Nikula, Intel Open Source Technology Center