[Intel-gfx] [PATCH v2] drm/i915: Forcewake Register Range changes for CHV

[Daniel Vetter]

On Thu, Dec 11, 2014 at 09:42:49PM +0530, deepak.s at linux.intel.com wrote:
> From: Deepak S <deepak.s at linux.intel.com>
> 
> According to updated BSpec, Render/Common/media Wells register range changed.
> Updating the same to match the spec and avoid extra forcewake for none
> forcewake range.
> 
> v2: Update media forcewake range (Ville)
> 
> Signed-off-by: Deepak S <deepak.s at linux.intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch