[Intel-gfx] [PATCH 10/11] drm/i915: HSW+ FBC is tied to pipe A

[Daniel Vetter]

On Fri, Dec 12, 2014 at 05:23:24PM -0800, Rodrigo Vivi wrote:
> I always ask myself if we should just clean the code and remove all
> platforms before HSW that always had many fbc issues. So we could make
> it simple and just do for pipe A for all platforms.

With frontbuffer tracking we should be able to get it going on snb+ at
least. Before that workarounds are too horrible really, and pre-g4x is
fbc1 which is an entirely different beast. Unfortuately our code
implements fbc2 like fbc1 so would benefit from a split at least.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch