[Intel-gfx] [PATCH v3 7/8] drm/i915: Create vGPU specific write MMIO to reduce traps

Yu, Zhang yu.c.zhang at linux.intel.com
Tue Dec 16 23:28:29 PST 2014



On 12/12/2014 9:31 PM, Tvrtko Ursulin wrote:
>
> On 11/13/2014 12:02 PM, Yu Zhang wrote:
>> In the virtualized environment, forcewake operations are not
>> necessory for the driver, because mmio accesses will be trapped
>
> necessary
Thanks.
>
>> and emulated by the host side, and real forcewake operations are
>> also done in the host. New mmio write handlers are added to directly
>> call the __raw_i915_write, therefore will reduce many traps and
>> increase the overall performance for drivers running in the VM
>> with Intel GVT-g enhancement.
>>
>> v2:
>> take Chris' comments:
>>          - register the mmio hooks in intel_uncore_init()
>> v3:
>> take Daniel's comments:
>>          - use macros to assign mmio write functions for vGPU
>>
>> Signed-off-by: Yu Zhang <yu.c.zhang at linux.intel.com>
>> Signed-off-by: Jike Song <jike.song at intel.com>
>> Signed-off-by: Kevin Tian <kevin.tian at intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_uncore.c | 16 ++++++++++++++++
>>   1 file changed, 16 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_uncore.c
>> b/drivers/gpu/drm/i915/intel_uncore.c
>> index cae27bb..b76c21d 100644
>> --- a/drivers/gpu/drm/i915/intel_uncore.c
>> +++ b/drivers/gpu/drm/i915/intel_uncore.c
>> @@ -727,6 +727,14 @@ hsw_write##x(struct drm_i915_private *dev_priv,
>> off_t reg, u##x val, bool trace)
>>       REG_WRITE_FOOTER; \
>>   }
>>
>> +#define __vgpu_write(x) \
>> +static void \
>> +vgpu_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val,
>> bool trace) { \
>> +    REG_WRITE_HEADER; \
>> +    __raw_i915_write##x(dev_priv, reg, val); \
>> +    REG_WRITE_FOOTER; \
>> +}
>> +
>>   static const u32 gen8_shadowed_regs[] = {
>>       FORCEWAKE_MT,
>>       GEN6_RPNSWREQ,
>> @@ -821,6 +829,10 @@ __gen4_write(8)
>>   __gen4_write(16)
>>   __gen4_write(32)
>>   __gen4_write(64)
>> +__vgpu_write(8)
>> +__vgpu_write(16)
>> +__vgpu_write(32)
>> +__vgpu_write(64)
>>
>>   #undef __chv_write
>>   #undef __gen8_write
>> @@ -828,6 +840,7 @@ __gen4_write(64)
>>   #undef __gen6_write
>>   #undef __gen5_write
>>   #undef __gen4_write
>> +#undef __vgpu_write
>>   #undef REG_WRITE_FOOTER
>>   #undef REG_WRITE_HEADER
>>
>> @@ -939,6 +952,9 @@ void intel_uncore_init(struct drm_device *dev)
>>           break;
>>       }
>>
>> +    if (intel_vgpu_active(dev))
>> +        ASSIGN_WRITE_MMIO_VFUNCS(vgpu);
>> +
>>       i915_check_and_clear_faults(dev);
>>   }
>>   #undef ASSIGN_WRITE_MMIO_VFUNCS
>>
>
> Maybe I am missing something obvious, but why are read variants not needed?
Wah. You got me. Guess I missed this during rebase. Thank you, Tvrtko.
>
> Regards,
>
> Tvrtko
>
>
B.R.
Yu



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