[Intel-gfx] [PATCH v4 3/3] drm/i915: vlv: sanitize RPS interrupt mask during GPU idling

[Jani Nikula]

On Fri, 19 Dec 2014, Imre Deak <imre.deak at intel.com> wrote:
> We apply the RPS interrupt workaround on VLV everywhere except when
> writing the mask directly during idling the GPU. For consistency do this
> also there.
>
> While at it also extend the code comment about affected platforms.
> I couldn't reproduce the issue on VLV fixed by this workaround, by
> removing the workaround from everywhere, while it's 100% reproducible on
> SNB using igt/gem_reset_stats/ban-ctx-render. So also add a note that
> it hasn't been verified if the workaround really applies to VLV/CHV.
>
> Suggested-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>

All three pushed to drm-intel-fixes, thanks for the patches and review.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 4 +++-
>  drivers/gpu/drm/i915/intel_pm.c | 3 ++-
>  2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index f853f26..818ab4e 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -299,8 +299,10 @@ void gen6_enable_rps_interrupts(struct drm_device *dev)
>  u32 gen6_sanitize_rps_pm_mask(struct drm_i915_private *dev_priv, u32 mask)
>  {
>  	/*
> -	 * IVB and SNB hard hangs on looping batchbuffer
> +	 * SNB,IVB can while VLV,CHV may hard hang on looping batchbuffer
>  	 * if GEN6_PM_UP_EI_EXPIRED is masked.
> +	 *
> +	 * TODO: verify if this can be reproduced on VLV,CHV.
>  	 */
>  	if (INTEL_INFO(dev_priv)->gen <= 7 && !IS_HASWELL(dev_priv))
>  		mask &= ~GEN6_PM_RP_UP_EI_EXPIRED;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 4bd1b8b..7d99a9c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3814,7 +3814,8 @@ static void vlv_set_rps_idle(struct drm_i915_private *dev_priv)
>  		return;
>  
>  	/* Mask turbo interrupt so that they will not come in between */
> -	I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);
> +	I915_WRITE(GEN6_PMINTRMSK,
> +		   gen6_sanitize_rps_pm_mask(dev_priv, ~0));
>  
>  	vlv_force_gfx_clock(dev_priv, true);
>  
> -- 
> 1.8.4
>
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-- 
Jani Nikula, Intel Open Source Technology Center