[Intel-gfx] [RFC 00/22] Gen7 batch buffer command parser

[Daniel Vetter]

On Wed, Feb 5, 2014 at 7:18 PM, Volkin, Bradley D
<bradley.d.volkin at intel.com> wrote:
> On Wed, Feb 05, 2014 at 02:28:29AM -0800, Chris Wilson wrote:
>> On Tue, Nov 26, 2013 at 08:51:17AM -0800, bradley.d.volkin at intel.com wrote:
>> > From: Brad Volkin <bradley.d.volkin at intel.com>
>> >
>> > Certain OpenGL features (e.g. transform feedback, performance monitoring)
>> > require userspace code to submit batches containing commands such as
>> > MI_LOAD_REGISTER_IMM to access various registers. Unfortunately, some
>> > generations of the hardware will noop these commands in "unsecure" batches
>> > (which includes all userspace batches submitted via i915) even though the
>> > commands may be safe and represent the intended programming model of the device.
>> >
>> > This series introduces a software command parser similar in operation to the
>> > command parsing done in hardware for unsecure batches. However, the software
>> > parser allows some operations that would be noop'd by hardware, if the parser
>> > determines the operation is safe, and submits the batch as "secure" to prevent
>> > hardware parsing. Currently the series implements this on IVB and HSW.
>>
>> Just one more question... Do you have a branch for people to test?
>
> Not at the moment. And as mentioned in the v2 cover letter, it's actually not
> particularly testable (or mergeable for that matter) right now because of a
> regression in secure dispatch on nightly.

The command parser itself should still work, even with the regression
in -nightly. The copying and secure dispatch are obviously fail atm.
That still leaves regression testing of current userspace and
micro-optimizing the checker itself as possible things to do. Otoh not
sure what exactly Chris wanted to test.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch