[Intel-gfx] [PATCH 7/9] drm/i915/bdw: RPS frequency bits are the same as HSW

Rodrigo Vivi rodrigo.vivi at gmail.com
Thu Feb 6 14:52:15 CET 2014


Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>

On Wed, Jan 29, 2014 at 2:25 AM, Ben Widawsky
<benjamin.widawsky at intel.com> wrote:
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 34cc898..deaaaf2 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3016,7 +3016,7 @@ void gen6_set_rps(struct drm_device *dev, u8 val)
>
>         gen6_set_rps_thresholds(dev_priv, val);
>
> -       if (IS_HASWELL(dev))
> +       if (IS_HASWELL(dev) || IS_BROADWELL(dev))
>                 I915_WRITE(GEN6_RPNSWREQ,
>                            HSW_FREQUENCY(val));
>         else
> --
> 1.8.5.3
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br



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