[Intel-gfx] [PATCH] drm/i915: Fix correct FIFO size for Baytrail
Daniel Vetter
daniel at ffwll.ch
Fri Feb 7 19:58:47 CET 2014
On Fri, Feb 07, 2014 at 05:58:16PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 07, 2014 at 08:43:12PM +0530, Vijay Purushothaman wrote:
> > B-spec says the FIFO total size is 512. So fix this to 512.
> >
> > Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman at intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index cc3ea04..fb73031 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3395,7 +3395,7 @@
> > #define I915_FIFO_LINE_SIZE 64
> > #define I830_FIFO_LINE_SIZE 32
> >
> > -#define VALLEYVIEW_FIFO_SIZE 255
> > +#define VALLEYVIEW_FIFO_SIZE 511
> > #define G4X_FIFO_SIZE 127
> > #define I965_FIFO_SIZE 512
> > #define I945_FIFO_SIZE 127
>
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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