[Intel-gfx] [PATCH 2/2] drm/i915: PSR HSW: update after enabling sprite.

Ville Syrjälä ville.syrjala at linux.intel.com
Fri Feb 7 20:17:45 CET 2014


On Fri, Feb 07, 2014 at 04:09:48PM -0200, Rodrigo Vivi wrote:
> On the current structure HSW doesn't support PSR with sprites enabled
> but sprites can be enabled after PSR was enabled what would cause
> user to miss screen updates.
> 
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
> ---
>  drivers/gpu/drm/i915/intel_sprite.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 336ae6c..3132686 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -318,6 +318,8 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
>  	I915_WRITE(SPRSURF(pipe),
>  		   i915_gem_obj_ggtt_offset(obj) + sprsurf_offset);
>  	POSTING_READ(SPRSURF(pipe));
> +
> +	intel_edp_psr_update(dev);

I was thinking this might be better placed in intel_update_plane()
since the fbc/ips stuff is there, but I can live with it being here too.

But should if have a HSW check on it? BDW doesn't have this restriction
anymore, right?

>  }
>  
>  static void
> -- 
> 1.7.11.7

-- 
Ville Syrjälä
Intel OTC



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