[Intel-gfx] [PATCH 11/19] drm/i915: vlv: keep first level vblank IRQs masked

[Ville Syrjälä]

On Tue, Feb 18, 2014 at 12:02:12AM +0200, Imre Deak wrote:
> This is a left-over from
> 
> commit b7e634cc8dcd320123199a18bae0937b40dc28b8
> Author: Imre Deak <imre.deak at intel.com>
> Date:   Tue Feb 4 21:35:45 2014 +0200
> 
> drm/i915: vlv: don't unmask IIR[DISPLAY_PIPE_A/B_VBLANK] interrupt
> 
> where we stopped unmasking the vblank IRQs, but left them enabled in the
> IER register. Disable them in IER too.
> 
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 8 ++------
>  1 file changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index f68aee3..75dd0a8 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3026,17 +3026,13 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
>  
>  	enable_mask = I915_DISPLAY_PORT_INTERRUPT;
>  	enable_mask |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> -		I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
> -		I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> -		I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
> +		I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
>  
>  	/*
>  	 *Leave vblank interrupts masked initially.  enable/disable will
>  	 * toggle them based on usage.
>  	 */

This comment is now stale.

> -	dev_priv->irq_mask = (~enable_mask) |
> -		I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
> -		I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
> +	dev_priv->irq_mask = ~enable_mask;
>  
>  	I915_WRITE(PORT_HOTPLUG_EN, 0);
>  	POSTING_READ(PORT_HOTPLUG_EN);
> -- 
> 1.8.4
> 
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-- 
Ville Syrjälä
Intel OTC