[Intel-gfx] [PATCH 14/19] drm/i915: switch order of power domain init wrt. irq install

Jesse Barnes jbarnes at virtuousgeek.org
Thu Feb 20 20:48:10 CET 2014


On Tue, 18 Feb 2014 00:02:15 +0200
Imre Deak <imre.deak at intel.com> wrote:

> On VLV at least the display IRQ register access and functionality
> depends on its power well to be on, so move the power domain HW init
> before we install the IRQs.
> 
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_dma.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 8177c17..f8f7a59 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1321,12 +1321,12 @@ static int i915_load_modeset_init(struct drm_device *dev)
>  	if (ret)
>  		goto cleanup_vga_switcheroo;
>  
> +	intel_power_domains_init_hw(dev_priv);
> +
>  	ret = drm_irq_install(dev);
>  	if (ret)
>  		goto cleanup_gem_stolen;
>  
> -	intel_power_domains_init_hw(dev_priv);
> -
>  	/* Important: The output setup functions called by modeset_init need
>  	 * working irqs for e.g. gmbus and dp aux transfers. */
>  	intel_modeset_init(dev);

Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>

That said, this was always one part of the PM code that confused me and
caused some refcounts to get messed up last time I worked on it.

I think it would be better to not treat init specially, and let the
power wells get turned on and off through normal power well get/put
calls during init and resume.

It's a bit noisy, power wise, but ultimately it might make for clearer
code and one less special case.

-- 
Jesse Barnes, Intel Open Source Technology Center



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