[Intel-gfx] [PATCH 08/19] drm/i915: get port power domain in connector detect

Imre Deak imre.deak at intel.com
Mon Feb 24 12:56:20 CET 2014


On Thu, 2014-02-20 at 11:33 -0800, Jesse Barnes wrote:
> On Wed, 19 Feb 2014 14:39:58 +0200
> Imre Deak <imre.deak at intel.com> wrote:
> 
> > On Wed, 2014-02-19 at 14:35 +0200, Ville Syrjälä wrote:
> > > On Tue, Feb 18, 2014 at 12:02:09AM +0200, Imre Deak wrote:
> > > > The connector detect and get_mode handlers need to access the port
> > > > specific HW blocks to read the EDID etc. Get/put the port power domains
> > > > around these handlers.
> > > > 
> > > > Signed-off-by: Imre Deak <imre.deak at intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/intel_crt.c | 42 ++++++++++++++++++++++++++++++++--------
> > > >  drivers/gpu/drm/i915/intel_dp.c  | 16 ++++++++++++---
> > > >  drivers/gpu/drm/i915/intel_dsi.c | 13 ++++++++++++-
> > > 
> > > And what about HDMI?
> > 
> > Good catch, I missed that one.
> 
> I wonder if we can catch bits like that using our display reg base
> bits.  We could have a platform specific power check for each block to
> do some basic sanity checking on whether the appropriate well was
> enabled and squak if not.
> 
> I just know we'll miss this more than once, and I'm not sure if the
> unclaimed reg stuff will save us on all platforms.

Yea, good idea. The register->power well mapping could be part of the
platform specific power well struct and we could assert on the SW state
of the well being 'enabled'.

--Imre

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