[Intel-gfx] [PATCH 0/4] drm/i915: Gen2/3 C3 wakeup stuff

[ville.syrjala at linux.intel.com]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

I tried to fix the C3 vs. vblank interrupt issues reportd in [1], but
it looks like the AGPBUSY# stuff doesn't help there for some reason. I
guess either the board isn't wired correctly, or we're missing
something else. I doubt the BM wakup mechanism itself would be
broken since then I would expect the machine to lock up when someone
does DMA while in C3. IIRC I actually had that kind of an issue on
some old VIA chipset long ago.

Anyways, my 855gm actually supports C3, and on that machine the MI_STATE
AGPBUSY# stuff is effective. So I'm going to assume that gen3 behaviour
should match, and so I'm just sticking it all into .init_clock_gating()
for both gen2 and gen3.

I also found another gen3 C3 bit in i915_gem_load(). I think it would
be better to collect that into .init_clock_gating() as well. But I left
it also in i915_gem_load() for UMS.

[1] https://bugs.freedesktop.org/show_bug.cgi?id=30364

Ville Syrjälä (4):
  drm/i915: Set AGPBUSY# bit in init_clock_gating
  drm/i915: Flip the sense of AGPBUSY_DIS bit
  drm/i915: Enable interrupt-based AGPBUSY# enable on 85x
  drm/i915: Move the C3 LP write bit setup to gen3_init_clock_gating()
    for KMS

 drivers/gpu/drm/i915/i915_gem.c |  2 +-
 drivers/gpu/drm/i915/i915_irq.c |  7 -------
 drivers/gpu/drm/i915/i915_reg.h |  6 +++++-
 drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++++
 4 files changed, 16 insertions(+), 9 deletions(-)

-- 
1.8.3.2