[Intel-gfx] [PATCH 2/2] drm/i915: Add thread stall DOP clock gating workaround on Broadwell.

[Ville Syrjälä]

On Wed, Feb 26, 2014 at 11:59:31PM -0800, Kenneth Graunke wrote:
> Ben and I believe this will be necessary on production hardware.
> 
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 1 +
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index f36d5e0..ade1d71 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5052,6 +5052,7 @@
>  
>  #define GEN8_ROW_CHICKEN		0xe4f0
>  #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
> +#define   STALL_DOP_GATING_DISABLE		(1<<5)
>  
>  #define GEN7_ROW_CHICKEN2		0xe4f4
>  #define GEN7_ROW_CHICKEN2_GT2		0xf4f4
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index df8ad21..226591d 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4842,6 +4842,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
>  	I915_WRITE(GEN8_ROW_CHICKEN,
>  	           _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
>  
> +	/* WaDisableThreadStallDopClockGating:bdw */
> +	I915_WRITE(GEN8_ROW_CHICKEN,
> +		   _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));

The spec and w/a database are a bit confused on this, but I get the
impression that you're correct. So:

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> +
>  	/*
>  	 * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
>  	 * pre-production hardware
> -- 
> 1.8.4.2
> 
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-- 
Ville Syrjälä
Intel OTC