[Intel-gfx] [PATCH 1/3] drm/i915: Only bind each object rather than for every execbuffer

[Chris Wilson]

On Wed, Jan 01, 2014 at 01:51:57PM -0800, Ben Widawsky wrote:
> On Wed, Jan 01, 2014 at 02:00:54PM +0000, Chris Wilson wrote:
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index 998f9a0b322a..d113eb5e2f5b 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -865,7 +865,7 @@ alloc:
> >  	if (ret == -ENOSPC && !retried) {
> >  		ret = i915_gem_evict_something(dev, &dev_priv->gtt.base,
> >  					       GEN6_PD_SIZE, GEN6_PD_ALIGN,
> > -					       I915_CACHE_NONE, false, true);
> > +					       I915_CACHE_NONE, 0);
> 
> You sure you want to stick this behavioral change in here?

Yes. Stupid bug that fortunately could not be triggered.

> > -	ret = i915_gem_obj_ggtt_pin(ctx, 4096, true, false);
> > +	ret = i915_gem_obj_ggtt_pin(ctx, 4096, 0);
> 
> and here?
> 
> >  	if (ret) {
> >  		DRM_ERROR("failed to pin power context: %d\n", ret);
> >  		goto err_unref;
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 442c9a66ebab..5744841669e4 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -531,9 +531,11 @@ init_pipe_control(struct intel_ring_buffer *ring)
> >  		goto err;
> >  	}
> >  
> > -	i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);
> > +	ret = i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);
> > +	if (ret)
> > +		goto err_unref;
> >  
> > -	ret = i915_gem_obj_ggtt_pin(ring->scratch.obj, 4096, true, false);
> > +	ret = i915_gem_obj_ggtt_pin(ring->scratch.obj, 4096, 0);
> >  	if (ret)
> >  		goto err_unref;
> 
> and here?
> 
> >  
> > @@ -1269,12 +1271,13 @@ static int init_status_page(struct intel_ring_buffer *ring)
> >  		goto err;
> >  	}
> >  
> > -	i915_gem_object_set_cache_level(obj, I915_CACHE_LLC);
> > +	ret = i915_gem_object_set_cache_level(obj, I915_CACHE_LLC);
> > +	if (ret)
> > +		goto err_unref;
> >  
> > -	ret = i915_gem_obj_ggtt_pin(obj, 4096, true, false);
> > -	if (ret != 0) {
> > +	ret = i915_gem_obj_ggtt_pin(obj, 4096, 0);
> > +	if (ret)
> >  		goto err_unref;
> > -	}
> 
> and here?
> 
> >  
> >  	ring->status_page.gfx_addr = i915_gem_obj_ggtt_offset(obj);
> >  	ring->status_page.page_addr = kmap(sg_page(obj->pages->sgl));
> > @@ -1354,7 +1357,7 @@ static int intel_init_ring_buffer(struct drm_device *dev,
> >  
> >  	ring->obj = obj;
> >  
> > -	ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE, true, false);
> > +	ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE, PIN_MAPPABLE);
> >  	if (ret)
> >  		goto err_unref;
> >  
> > @@ -1927,7 +1930,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
> >  			return -ENOMEM;
> >  		}
> >  
> > -		ret = i915_gem_obj_ggtt_pin(obj, 0, true, false);
> > +		ret = i915_gem_obj_ggtt_pin(obj, 0, 0);
> 
> and here?

YES!
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre