[Intel-gfx] [RFC PATCH] drm/i915: move module parameters into a struct
Paulo Zanoni
przanoni at gmail.com
Fri Jan 3 17:19:51 CET 2014
2014/1/3 Jani Nikula <jani.nikula at intel.com>:
> With 20+ module parameters I think referring to them via a struct
> improves clarity. The downsides are losing static on a couple of
> variables and not having the initialization and module_param_named()
> right next to each other. On the other hand, all module parameters are
> now defined in one place at i915_drv.c.
>
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 115 +++++++++++++++-------------
> drivers/gpu/drm/i915/i915_drv.h | 51 ++++++------
> drivers/gpu/drm/i915/i915_gem.c | 4 +-
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 4 +-
> drivers/gpu/drm/i915/intel_bios.c | 4 +-
> drivers/gpu/drm/i915/intel_display.c | 24 +++---
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/intel_lvds.c | 6 +-
> drivers/gpu/drm/i915/intel_panel.c | 15 +---
> drivers/gpu/drm/i915/intel_pm.c | 14 ++--
> 12 files changed, 127 insertions(+), 116 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 61fb9fc12064..a5965adb1dac 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -38,33 +38,53 @@
> #include <linux/module.h>
> #include <drm/drm_crtc_helper.h>
>
> -static int i915_modeset __read_mostly = -1;
> -module_param_named(modeset, i915_modeset, int, 0400);
> +struct i915_module_params i915_params __read_mostly = {
> + .modeset = -1,
> + .fbpercrtc = 0,
> + .panel_ignore_lid = 1,
> + .powersave = 1,
> + .semaphores = -1,
> + .lvds_downclock = 0,
> + .lvds_channel_mode = 0,
> + .panel_use_ssc = -1,
> + .vbt_sdvo_panel_type = -1,
> + .enable_rc6 = -1,
> + .enable_fbc = -1,
> + .enable_hangcheck = true,
> + .enable_ppgtt = -1,
> + .enable_psr = 0,
> + .preliminary_hw_support = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT),
> + .disable_power_well = 1,
> + .enable_ips = 1,
> + .fastboot = 0,
> + .enable_pc8 = 1,
> + .pc8_timeout = 5000,
> + .prefault_disable = 0,
> + .try_reset = true,
> + .invert_brightness = 0,
> +};
> +
> +module_param_named(modeset, i915_params.modeset, int, 0400);
> MODULE_PARM_DESC(modeset,
> "Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, "
> "1=on, -1=force vga console preference [default])");
>
> -unsigned int i915_fbpercrtc __always_unused = 0;
> -module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
> +module_param_named(fbpercrtc, i915_params.fbpercrtc, int, 0400);
>
> -int i915_panel_ignore_lid __read_mostly = 1;
> -module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600);
> +module_param_named(panel_ignore_lid, i915_params.panel_ignore_lid, int, 0600);
> MODULE_PARM_DESC(panel_ignore_lid,
> "Override lid status (0=autodetect, 1=autodetect disabled [default], "
> "-1=force lid closed, -2=force lid open)");
>
> -unsigned int i915_powersave __read_mostly = 1;
> -module_param_named(powersave, i915_powersave, int, 0600);
> +module_param_named(powersave, i915_params.powersave, int, 0600);
> MODULE_PARM_DESC(powersave,
> "Enable powersavings, fbc, downclocking, etc. (default: true)");
>
> -int i915_semaphores __read_mostly = -1;
> -module_param_named(semaphores, i915_semaphores, int, 0600);
> +module_param_named(semaphores, i915_params.semaphores, int, 0600);
> MODULE_PARM_DESC(semaphores,
> "Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))");
>
> -int i915_enable_rc6 __read_mostly = -1;
> -module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0400);
> +module_param_named(i915_enable_rc6, i915_params.enable_rc6, int, 0400);
> MODULE_PARM_DESC(i915_enable_rc6,
> "Enable power-saving render C-state 6. "
> "Different stages can be selected via bitmask values "
> @@ -72,89 +92,80 @@ MODULE_PARM_DESC(i915_enable_rc6,
> "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
> "default: -1 (use per-chip default)");
>
> -int i915_enable_fbc __read_mostly = -1;
> -module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
> +module_param_named(i915_enable_fbc, i915_params.enable_fbc, int, 0600);
> MODULE_PARM_DESC(i915_enable_fbc,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
>
> -unsigned int i915_lvds_downclock __read_mostly = 0;
> -module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
> +module_param_named(lvds_downclock, i915_params.lvds_downclock, int, 0400);
> MODULE_PARM_DESC(lvds_downclock,
> "Use panel (LVDS/eDP) downclocking for power savings "
> "(default: false)");
>
> -int i915_lvds_channel_mode __read_mostly;
> -module_param_named(lvds_channel_mode, i915_lvds_channel_mode, int, 0600);
> +module_param_named(lvds_channel_mode, i915_params.lvds_channel_mode, int, 0600);
> MODULE_PARM_DESC(lvds_channel_mode,
> "Specify LVDS channel mode "
> "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
>
> -int i915_panel_use_ssc __read_mostly = -1;
> -module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
> +module_param_named(lvds_use_ssc, i915_params.panel_use_ssc, int, 0600);
> MODULE_PARM_DESC(lvds_use_ssc,
> "Use Spread Spectrum Clock with panels [LVDS/eDP] "
> "(default: auto from VBT)");
>
> -int i915_vbt_sdvo_panel_type __read_mostly = -1;
> -module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);
> +module_param_named(vbt_sdvo_panel_type, i915_params.vbt_sdvo_panel_type, int, 0600);
> MODULE_PARM_DESC(vbt_sdvo_panel_type,
> "Override/Ignore selection of SDVO panel mode in the VBT "
> "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
>
> -static bool i915_try_reset __read_mostly = true;
> -module_param_named(reset, i915_try_reset, bool, 0600);
> +module_param_named(reset, i915_params.try_reset, bool, 0600);
> MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
>
> -bool i915_enable_hangcheck __read_mostly = true;
> -module_param_named(enable_hangcheck, i915_enable_hangcheck, bool, 0644);
> +module_param_named(enable_hangcheck, i915_params.enable_hangcheck, bool, 0644);
> MODULE_PARM_DESC(enable_hangcheck,
> "Periodically check GPU activity for detecting hangs. "
> "WARNING: Disabling this can cause system wide hangs. "
> "(default: true)");
>
> -int i915_enable_ppgtt __read_mostly = -1;
> -module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0400);
> +module_param_named(i915_enable_ppgtt, i915_params.enable_ppgtt, int, 0400);
> MODULE_PARM_DESC(i915_enable_ppgtt,
> "Override PPGTT usage. "
> "(-1=auto [default], 0=disabled, 1=aliasing, 2=full)");
>
> -int i915_enable_psr __read_mostly = 0;
> -module_param_named(enable_psr, i915_enable_psr, int, 0600);
> +module_param_named(enable_psr, i915_params.enable_psr, int, 0600);
> MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");
>
> -unsigned int i915_preliminary_hw_support __read_mostly = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT);
> -module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);
> +module_param_named(preliminary_hw_support, i915_params.preliminary_hw_support, int, 0600);
> MODULE_PARM_DESC(preliminary_hw_support,
> "Enable preliminary hardware support.");
>
> -int i915_disable_power_well __read_mostly = 1;
> -module_param_named(disable_power_well, i915_disable_power_well, int, 0600);
> +module_param_named(disable_power_well, i915_params.disable_power_well, int, 0600);
> MODULE_PARM_DESC(disable_power_well,
> "Disable the power well when possible (default: true)");
>
> -int i915_enable_ips __read_mostly = 1;
> -module_param_named(enable_ips, i915_enable_ips, int, 0600);
> +module_param_named(enable_ips, i915_params.enable_ips, int, 0600);
> MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");
>
> -bool i915_fastboot __read_mostly = 0;
> -module_param_named(fastboot, i915_fastboot, bool, 0600);
> +module_param_named(fastboot, i915_params.fastboot, bool, 0600);
> MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "
> "(default: false)");
>
> -int i915_enable_pc8 __read_mostly = 1;
> -module_param_named(enable_pc8, i915_enable_pc8, int, 0600);
> +module_param_named(enable_pc8, i915_params.enable_pc8, int, 0600);
> MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: true)");
>
> -int i915_pc8_timeout __read_mostly = 5000;
> -module_param_named(pc8_timeout, i915_pc8_timeout, int, 0600);
> +module_param_named(pc8_timeout, i915_params.pc8_timeout, int, 0600);
> MODULE_PARM_DESC(pc8_timeout, "Number of msecs of idleness required to enter PC8+ (default: 5000)");
>
> -bool i915_prefault_disable __read_mostly;
> -module_param_named(prefault_disable, i915_prefault_disable, bool, 0600);
> +module_param_named(prefault_disable, i915_params.prefault_disable, bool, 0600);
> MODULE_PARM_DESC(prefault_disable,
> "Disable page prefaulting for pread/pwrite/reloc (default:false). For developers only.");
>
> +MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
> + "(-1 force normal, 0 machine defaults, 1 force inversion), please "
> + "report PCI device ID, subsystem vendor and subsystem device ID "
> + "to dri-devel at lists.freedesktop.org, if your machine needs it. "
> + "It will then be included in an upcoming module version.");
> +module_param_named(invert_brightness, i915_params.invert_brightness, int, 0600);
> +
> static struct drm_driver driver;
>
> static const struct intel_device_info intel_i830_info = {
> @@ -485,12 +496,12 @@ bool i915_semaphore_is_enabled(struct drm_device *dev)
>
> /* Until we get further testing... */
> if (IS_GEN8(dev)) {
> - WARN_ON(!i915_preliminary_hw_support);
> + WARN_ON(!i915_params.preliminary_hw_support);
> return false;
> }
>
> - if (i915_semaphores >= 0)
> - return i915_semaphores;
> + if (i915_params.semaphores >= 0)
> + return i915_params.semaphores;
>
> #ifdef CONFIG_INTEL_IOMMU
> /* Enable semaphores on SNB when IO remapping is off */
> @@ -755,7 +766,7 @@ int i915_reset(struct drm_device *dev)
> bool simulated;
> int ret;
>
> - if (!i915_try_reset)
> + if (!i915_params.try_reset)
> return 0;
>
> mutex_lock(&dev->struct_mutex);
> @@ -823,7 +834,7 @@ static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
> struct intel_device_info *intel_info =
> (struct intel_device_info *) ent->driver_data;
>
> - if (IS_PRELIMINARY_HW(intel_info) && !i915_preliminary_hw_support) {
> + if (IS_PRELIMINARY_HW(intel_info) && !i915_params.preliminary_hw_support) {
> DRM_INFO("This hardware requires preliminary hardware support.\n"
> "See CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT, and/or modparam preliminary_hw_support\n");
> return -ENODEV;
> @@ -1046,14 +1057,14 @@ static int __init i915_init(void)
> * the default behavior.
> */
> #if defined(CONFIG_DRM_I915_KMS)
> - if (i915_modeset != 0)
> + if (i915_params.modeset != 0)
> driver.driver_features |= DRIVER_MODESET;
> #endif
> - if (i915_modeset == 1)
> + if (i915_params.modeset == 1)
> driver.driver_features |= DRIVER_MODESET;
>
> #ifdef CONFIG_VGA_CONSOLE
> - if (vgacon_text_force() && i915_modeset == -1)
> + if (vgacon_text_force() && i915_params.modeset == -1)
> driver.driver_features &= ~DRIVER_MODESET;
> #endif
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index cc8afff878b1..86fb6fd60862 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1898,26 +1898,33 @@ struct drm_i915_file_private {
>
> extern const struct drm_ioctl_desc i915_ioctls[];
> extern int i915_max_ioctl;
> -extern unsigned int i915_fbpercrtc __always_unused;
> -extern int i915_panel_ignore_lid __read_mostly;
> -extern unsigned int i915_powersave __read_mostly;
> -extern int i915_semaphores __read_mostly;
> -extern unsigned int i915_lvds_downclock __read_mostly;
> -extern int i915_lvds_channel_mode __read_mostly;
> -extern int i915_panel_use_ssc __read_mostly;
> -extern int i915_vbt_sdvo_panel_type __read_mostly;
> -extern int i915_enable_rc6 __read_mostly;
> -extern int i915_enable_fbc __read_mostly;
> -extern bool i915_enable_hangcheck __read_mostly;
> -extern int i915_enable_ppgtt __read_mostly;
> -extern int i915_enable_psr __read_mostly;
> -extern unsigned int i915_preliminary_hw_support __read_mostly;
> -extern int i915_disable_power_well __read_mostly;
> -extern int i915_enable_ips __read_mostly;
> -extern bool i915_fastboot __read_mostly;
> -extern int i915_enable_pc8 __read_mostly;
> -extern int i915_pc8_timeout __read_mostly;
> -extern bool i915_prefault_disable __read_mostly;
> +
> +struct i915_module_params {
> + int modeset;
> + unsigned int fbpercrtc;
> + int panel_ignore_lid;
> + unsigned int powersave;
> + int semaphores;
> + unsigned int lvds_downclock;
> + int lvds_channel_mode;
> + int panel_use_ssc;
> + int vbt_sdvo_panel_type;
> + int enable_rc6;
> + int enable_fbc;
> + bool enable_hangcheck;
> + int enable_ppgtt;
> + int enable_psr;
> + unsigned int preliminary_hw_support;
> + int disable_power_well;
> + int enable_ips;
> + bool fastboot;
> + int enable_pc8;
> + int pc8_timeout;
> + bool prefault_disable;
> + bool try_reset;
> + int invert_brightness;
> +};
> +extern struct i915_module_params i915_params __read_mostly;
>
> extern int i915_suspend(struct drm_device *dev, pm_message_t state);
> extern int i915_resume(struct drm_device *dev);
> @@ -2303,10 +2310,10 @@ static inline void i915_gem_chipset_flush(struct drm_device *dev)
> int i915_gem_init_ppgtt(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
> static inline bool intel_enable_ppgtt(struct drm_device *dev, bool full)
> {
> - if (i915_enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev))
> + if (i915_params.enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev))
> return false;
>
> - if (i915_enable_ppgtt == 1 && full)
> + if (i915_params.enable_ppgtt == 1 && full)
> return false;
>
> #ifdef CONFIG_INTEL_IOMMU
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 656406deada0..3107d045831d 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -476,7 +476,7 @@ i915_gem_shmem_pread(struct drm_device *dev,
>
> mutex_unlock(&dev->struct_mutex);
>
> - if (likely(!i915_prefault_disable) && !prefaulted) {
> + if (likely(!i915_params.prefault_disable) && !prefaulted) {
> ret = fault_in_multipages_writeable(user_data, remain);
> /* Userspace is tricking us, but we've already clobbered
> * its pages with the prefault and promised to write the
> @@ -868,7 +868,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
> args->size))
> return -EFAULT;
>
> - if (likely(!i915_prefault_disable)) {
> + if (likely(!i915_params.prefault_disable)) {
> ret = fault_in_multipages_readable(to_user_ptr(args->data_ptr),
> args->size);
> if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index bbff8f9b6549..8f5ff676531b 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -896,7 +896,7 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
> if (!access_ok(VERIFY_WRITE, ptr, length))
> return -EFAULT;
>
> - if (likely(!i915_prefault_disable)) {
> + if (likely(!i915_params.prefault_disable)) {
> if (fault_in_multipages_readable(ptr, length))
> return -EFAULT;
> }
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 998f9a0b322a..5b4316780104 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1541,7 +1541,7 @@ static inline unsigned int gen8_get_total_gtt_size(u16 bdw_gmch_ctl)
> if (bdw_gmch_ctl)
> bdw_gmch_ctl = 1 << bdw_gmch_ctl;
> if (bdw_gmch_ctl > 4) {
> - WARN_ON(!i915_preliminary_hw_support);
> + WARN_ON(!i915_params.preliminary_hw_support);
> return 4<<20;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 1d44c793bdf4..4c5a96b807f6 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2474,7 +2474,7 @@ static void i915_hangcheck_elapsed(unsigned long data)
> #define HUNG 20
> #define FIRE 30
>
> - if (!i915_enable_hangcheck)
> + if (!i915_params.enable_hangcheck)
> return;
>
> for_each_ring(ring, dev_priv, i) {
> @@ -2576,7 +2576,7 @@ static void i915_hangcheck_elapsed(unsigned long data)
> void i915_queue_hangcheck(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> - if (!i915_enable_hangcheck)
> + if (!i915_params.enable_hangcheck)
> return;
>
> mod_timer(&dev_priv->gpu_error.hangcheck_timer,
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index f22041973f3a..285bb0ffa7a2 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -259,7 +259,7 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
> downclock = dvo_timing->clock;
> }
>
> - if (downclock < panel_dvo_timing->clock && i915_lvds_downclock) {
> + if (downclock < panel_dvo_timing->clock && i915_params.lvds_downclock) {
> dev_priv->lvds_downclock_avail = 1;
> dev_priv->lvds_downclock = downclock * 10;
> DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
> @@ -318,7 +318,7 @@ parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
> struct drm_display_mode *panel_fixed_mode;
> int index;
>
> - index = i915_vbt_sdvo_panel_type;
> + index = i915_params.vbt_sdvo_panel_type;
> if (index == -2) {
> DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
> return;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 4d1357a32c41..81335a2ecf40 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2368,7 +2368,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
> * whether the platform allows pfit disable with pipe active, and only
> * then update the pipesrc and pfit state, even on the flip path.
> */
> - if (i915_fastboot) {
> + if (i915_params.fastboot) {
> const struct drm_display_mode *adjusted_mode =
> &intel_crtc->config.adjusted_mode;
>
> @@ -4553,7 +4553,7 @@ retry:
> static void hsw_compute_ips_config(struct intel_crtc *crtc,
> struct intel_crtc_config *pipe_config)
> {
> - pipe_config->ips_enabled = i915_enable_ips &&
> + pipe_config->ips_enabled = i915_params.enable_ips &&
> hsw_crtc_supports_ips(crtc) &&
> pipe_config->pipe_bpp <= 24;
> }
> @@ -4754,8 +4754,8 @@ intel_link_compute_m_n(int bits_per_pixel, int nlanes,
>
> static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
> {
> - if (i915_panel_use_ssc >= 0)
> - return i915_panel_use_ssc != 0;
> + if (i915_params.panel_use_ssc >= 0)
> + return i915_params.panel_use_ssc != 0;
> return dev_priv->vbt.lvds_use_ssc
> && !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
> }
> @@ -4814,7 +4814,7 @@ static void i9xx_update_pll_dividers(struct intel_crtc *crtc,
>
> crtc->lowfreq_avail = false;
> if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS) &&
> - reduced_clock && i915_powersave) {
> + reduced_clock && i915_params.powersave) {
> I915_WRITE(FP1(pipe), fp2);
> crtc->config.dpll_hw_state.fp1 = fp2;
> crtc->lowfreq_avail = true;
> @@ -6311,7 +6311,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
> if (intel_crtc->config.has_dp_encoder)
> intel_dp_set_m_n(intel_crtc);
>
> - if (is_lvds && has_reduced_clock && i915_powersave)
> + if (is_lvds && has_reduced_clock && i915_params.powersave)
> intel_crtc->lowfreq_avail = true;
> else
> intel_crtc->lowfreq_avail = false;
> @@ -6679,7 +6679,7 @@ static void __hsw_enable_package_c8(struct drm_i915_private *dev_priv)
> return;
>
> schedule_delayed_work(&dev_priv->pc8.enable_work,
> - msecs_to_jiffies(i915_pc8_timeout));
> + msecs_to_jiffies(i915_params.pc8_timeout));
> }
>
> static void __hsw_disable_package_c8(struct drm_i915_private *dev_priv)
> @@ -6778,7 +6778,7 @@ static void hsw_update_package_c8(struct drm_device *dev)
> if (!HAS_PC8(dev_priv->dev))
> return;
>
> - if (!i915_enable_pc8)
> + if (!i915_params.enable_pc8)
> return;
>
> mutex_lock(&dev_priv->pc8.lock);
> @@ -8163,7 +8163,7 @@ void intel_mark_idle(struct drm_device *dev)
>
> hsw_package_c8_gpu_idle(dev_priv);
>
> - if (!i915_powersave)
> + if (!i915_params.powersave)
> return;
>
> list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
> @@ -8183,7 +8183,7 @@ void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
> struct drm_device *dev = obj->base.dev;
> struct drm_crtc *crtc;
>
> - if (!i915_powersave)
> + if (!i915_params.powersave)
> return;
>
> list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
> @@ -9815,7 +9815,7 @@ intel_set_config_compute_mode_changes(struct drm_mode_set *set,
> struct intel_crtc *intel_crtc =
> to_intel_crtc(set->crtc);
>
> - if (intel_crtc->active && i915_fastboot) {
> + if (intel_crtc->active && i915_params.fastboot) {
> DRM_DEBUG_KMS("crtc has no fb, will flip\n");
> config->fb_changed = true;
> } else {
> @@ -11197,7 +11197,7 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
> */
> list_for_each_entry(crtc, &dev->mode_config.crtc_list,
> base.head) {
> - if (crtc->active && i915_fastboot) {
> + if (crtc->active && i915_params.fastboot) {
> intel_crtc_mode_from_pipe_config(crtc, &crtc->config);
>
> DRM_DEBUG_KMS("[CRTC:%d] found active mode: ",
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 7df5085973e9..a0755a9f1193 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1661,7 +1661,7 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
> return false;
> }
>
> - if (!i915_enable_psr) {
> + if (!i915_params.enable_psr) {
> DRM_DEBUG_KMS("PSR disable by flag\n");
> return false;
> }
> diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> index 8bcb93a2a9f6..b009c92a4a85 100644
> --- a/drivers/gpu/drm/i915/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/intel_lvds.c
> @@ -848,8 +848,8 @@ static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
> struct drm_i915_private *dev_priv = dev->dev_private;
>
> /* use the module option value if specified */
> - if (i915_lvds_channel_mode > 0)
> - return i915_lvds_channel_mode == 2;
> + if (i915_params.lvds_channel_mode > 0)
> + return i915_params.lvds_channel_mode == 2;
>
> if (dmi_check_system(intel_dual_link_lvds))
> return true;
> @@ -1036,7 +1036,7 @@ void intel_lvds_init(struct drm_device *dev)
> intel_find_panel_downclock(dev,
> fixed_mode, connector);
> if (intel_connector->panel.downclock_mode !=
> - NULL && i915_lvds_downclock) {
> + NULL && i915_params.lvds_downclock) {
> /* We found the downclock for LVDS. */
> dev_priv->lvds_downclock_avail = true;
> dev_priv->lvds_downclock =
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index 20ebc3e83d39..173cf420c490 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -325,13 +325,6 @@ out:
> pipe_config->gmch_pfit.lvds_border_bits = border;
> }
>
> -static int i915_panel_invert_brightness;
> -MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
> - "(-1 force normal, 0 machine defaults, 1 force inversion), please "
> - "report PCI device ID, subsystem vendor and subsystem device ID "
> - "to dri-devel at lists.freedesktop.org, if your machine needs it. "
> - "It will then be included in an upcoming module version.");
> -module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
> static u32 intel_panel_compute_brightness(struct intel_connector *connector,
> u32 val)
> {
> @@ -341,10 +334,10 @@ static u32 intel_panel_compute_brightness(struct intel_connector *connector,
>
> WARN_ON(panel->backlight.max == 0);
>
> - if (i915_panel_invert_brightness < 0)
> + if (i915_params.invert_brightness < 0)
> return val;
>
> - if (i915_panel_invert_brightness > 0 ||
> + if (i915_params.invert_brightness > 0 ||
> dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
> return panel->backlight.max - val;
> }
> @@ -810,13 +803,13 @@ intel_panel_detect(struct drm_device *dev)
> struct drm_i915_private *dev_priv = dev->dev_private;
>
> /* Assume that the BIOS does not lie through the OpRegion... */
> - if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
> + if (!i915_params.panel_ignore_lid && dev_priv->opregion.lid_state) {
> return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
> connector_status_connected :
> connector_status_disconnected;
> }
>
> - switch (i915_panel_ignore_lid) {
> + switch (i915_params.panel_ignore_lid) {
> case -2:
> return connector_status_connected;
> case -1:
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 469170c11bb4..70ec956985cb 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -466,7 +466,7 @@ void intel_update_fbc(struct drm_device *dev)
> return;
> }
>
> - if (!i915_powersave) {
> + if (!i915_params.powersave) {
> if (set_no_fbc_reason(dev_priv, FBC_MODULE_PARAM))
> DRM_DEBUG_KMS("fbc disabled per module param\n");
> return;
> @@ -505,13 +505,13 @@ void intel_update_fbc(struct drm_device *dev)
> obj = intel_fb->obj;
> adjusted_mode = &intel_crtc->config.adjusted_mode;
>
> - if (i915_enable_fbc < 0 &&
> + if (i915_params.enable_fbc < 0 &&
> INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) {
> if (set_no_fbc_reason(dev_priv, FBC_CHIP_DEFAULT))
> DRM_DEBUG_KMS("disabled per chip default\n");
> goto out_disable;
> }
> - if (!i915_enable_fbc) {
> + if (!i915_params.enable_fbc) {
> if (set_no_fbc_reason(dev_priv, FBC_MODULE_PARAM))
> DRM_DEBUG_KMS("fbc disabled per module param\n");
> goto out_disable;
> @@ -3166,8 +3166,8 @@ int intel_enable_rc6(const struct drm_device *dev)
> return 0;
>
> /* Respect the kernel parameter if it is set */
> - if (i915_enable_rc6 >= 0)
> - return i915_enable_rc6;
> + if (i915_params.enable_rc6 >= 0)
> + return i915_params.enable_rc6;
>
> /* Disable RC6 on Ironlake */
> if (INTEL_INFO(dev)->gen == 5)
> @@ -4724,7 +4724,7 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> /* FIXME(BDW): Check all the w/a, some might only apply to
> * pre-production hw. */
>
> - WARN(!i915_preliminary_hw_support,
> + WARN(!i915_params.preliminary_hw_support,
> "GEN8_CENTROID_PIXEL_OPT_DIS not be needed for production\n");
> I915_WRITE(HALF_SLICE_CHICKEN3,
> _MASKED_BIT_ENABLE(GEN8_CENTROID_PIXEL_OPT_DIS));
> @@ -5287,7 +5287,7 @@ static void __intel_power_well_put(struct drm_device *dev,
> WARN_ON(!power_well->count);
>
> if (!--power_well->count && power_well->set &&
> - i915_disable_power_well) {
> + i915_params.disable_power_well) {
> power_well->set(dev, power_well, false);
> hsw_enable_package_c8(dev_priv);
> }
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Paulo Zanoni
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