[Intel-gfx] [PATCH] drm/i915: Drop I915_ prefix from HAS_FBC

[Ville Syrjälä]

On Fri, Jan 10, 2014 at 08:53:42AM +0100, Daniel Vetter wrote:
> My OCD just couldn't let this slide. Spotted while reviewing Ville's
> patch to only flip planes when we have FBC.
> 
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Right. It has bothered me too, but I've been too lazy to run sed.

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c  | 2 +-
>  drivers/gpu/drm/i915/i915_drv.h      | 2 +-
>  drivers/gpu/drm/i915/i915_irq.c      | 4 ++--
>  drivers/gpu/drm/i915/i915_suspend.c  | 4 ++--
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  drivers/gpu/drm/i915/intel_pm.c      | 4 ++--
>  6 files changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 16e8e09bbdd6..95c92c8e55b3 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1295,7 +1295,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
>  	struct drm_device *dev = node->minor->dev;
>  	drm_i915_private_t *dev_priv = dev->dev_private;
>  
> -	if (!I915_HAS_FBC(dev)) {
> +	if (!HAS_FBC(dev)) {
>  		seq_puts(m, "FBC unsupported on this chipset\n");
>  		return 0;
>  	}
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 88901e5e1b7a..cf7922bdf87c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1844,7 +1844,7 @@ struct drm_i915_file_private {
>  
>  #define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
>  #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
> -#define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
> +#define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
>  
>  #define HAS_IPS(dev)		(IS_ULT(dev) || IS_BROADWELL(dev))
>  
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 158cb3077ed6..261254a8a385 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3220,7 +3220,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
>  
>  		for_each_pipe(pipe) {
>  			int plane = pipe;
> -			if (I915_HAS_FBC(dev))
> +			if (HAS_FBC(dev))
>  				plane = !plane;
>  
>  			if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS &&
> @@ -3421,7 +3421,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
>  
>  		for_each_pipe(pipe) {
>  			int plane = pipe;
> -			if (I915_HAS_FBC(dev))
> +			if (HAS_FBC(dev))
>  				plane = !plane;
>  
>  			if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS &&
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index 6b8fef7fb3bb..8150fdc08d49 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -237,7 +237,7 @@ static void i915_save_display(struct drm_device *dev)
>  	}
>  
>  	/* Only regfile.save FBC state on the platform that supports FBC */
> -	if (I915_HAS_FBC(dev)) {
> +	if (HAS_FBC(dev)) {
>  		if (HAS_PCH_SPLIT(dev)) {
>  			dev_priv->regfile.saveDPFC_CB_BASE = I915_READ(ILK_DPFC_CB_BASE);
>  		} else if (IS_GM45(dev)) {
> @@ -300,7 +300,7 @@ static void i915_restore_display(struct drm_device *dev)
>  
>  	/* only restore FBC info on the platform that supports FBC*/
>  	intel_disable_fbc(dev);
> -	if (I915_HAS_FBC(dev)) {
> +	if (HAS_FBC(dev)) {
>  		if (HAS_PCH_SPLIT(dev)) {
>  			I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->regfile.saveDPFC_CB_BASE);
>  		} else if (IS_GM45(dev)) {
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index dd064faccb27..c4d3f4391686 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10169,7 +10169,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
>  	 */
>  	intel_crtc->pipe = pipe;
>  	intel_crtc->plane = pipe;
> -	if (I915_HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4) {
> +	if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4) {
>  		DRM_DEBUG_KMS("swapping pipes & planes for FBC\n");
>  		intel_crtc->plane = !pipe;
>  	}
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 534459944d70..26e6d1b5363f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -461,7 +461,7 @@ void intel_update_fbc(struct drm_device *dev)
>  	const struct drm_display_mode *adjusted_mode;
>  	unsigned int max_width, max_height;
>  
> -	if (!I915_HAS_FBC(dev)) {
> +	if (!HAS_FBC(dev)) {
>  		set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED);
>  		return;
>  	}
> @@ -5541,7 +5541,7 @@ void intel_init_pm(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  
> -	if (I915_HAS_FBC(dev)) {
> +	if (HAS_FBC(dev)) {
>  		if (INTEL_INFO(dev)->gen >= 7) {
>  			dev_priv->display.fbc_enabled = ironlake_fbc_enabled;
>  			dev_priv->display.enable_fbc = gen7_enable_fbc;
> -- 
> 1.8.4.3

-- 
Ville Syrjälä
Intel OTC