[Intel-gfx] [PATCH 04/28] drm/i915: We implement WaDisableL3CacheAging:vlv
Rodrigo Vivi
rodrigo.vivi at gmail.com
Fri Jan 24 12:19:02 CET 2014
On Thu, Jan 23, 2014 at 6:32 PM, Ville Syrjälä
<ville.syrjala at linux.intel.com> wrote:
> On Thu, Jan 23, 2014 at 06:25:26PM -0200, Rodrigo Vivi wrote:
>> On Wed, Jan 22, 2014 at 5:32 PM, <ville.syrjala at linux.intel.com> wrote:
>> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>> >
>> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>> > ---
>> > drivers/gpu/drm/i915/intel_pm.c | 3 ++-
>> > 1 file changed, 2 insertions(+), 1 deletion(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> > index 6c0a10a..0e724c9 100644
>> > --- a/drivers/gpu/drm/i915/intel_pm.c
>> > +++ b/drivers/gpu/drm/i915/intel_pm.c
>> > @@ -4939,8 +4939,9 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
>> > I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
>> > GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
>> >
>> > - /* WaApplyL3ControlAndL3ChickenMode:vlv */
>> > + /* WaDisableL3CacheAging:vlv */
>>
>> this is right.
>>
>> > I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS);
>> > + /* WaApplyL3ControlAndL3ChickenMode:vlv */
>>
>> On wa_database I only see this name with ivb... nothing from vlv with
>> this wa name.
>
> Let me refer you to patch 16 in the series...
Cool thanks.
Sorry for not check that... I'm going on blocks of 4 ;)
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
for this one as well.
>
>>
>> > I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE);
>> >
>> > /* WaForceL3Serialization:vlv */
>> > --
>> > 1.8.3.2
>> >
>> > _______________________________________________
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>> > Intel-gfx at lists.freedesktop.org
>> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>
>>
>>
>> --
>> Rodrigo Vivi
>> Blog: http://blog.vivi.eng.br
>
> --
> Ville Syrjälä
> Intel OTC
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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