[Intel-gfx] [PATCH 4/5] drm/i915: Capture PPGTT info on error capture

[Ben Widawsky]

On Sun, Jan 26, 2014 at 11:42:22AM +0000, Chris Wilson wrote:
> On Fri, Jan 24, 2014 at 06:17:44PM -0800, Ben Widawsky wrote:
> > Cc: Chris Wilson <chris at chris-wilson.co.uk>
> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h       |  7 ++++++
> >  drivers/gpu/drm/i915/i915_gpu_error.c | 41 +++++++++++++++++++++++++++++++++++
> >  2 files changed, 48 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 6f68515..5105fd4 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -359,6 +359,13 @@ struct drm_i915_error_state {
> >  		s32 ring:4;
> >  		u32 cache_level:3;
> >  	} **active_bo, **pinned_bo;
> > +	struct drm_i915_vm_info {
> > +		u32 gfx_mode;
> > +		union {
> > +			u64 pdp[4];
> > +			u32 pp_dir_base;
> > +		};
> > +	} vm_info[I915_NUM_RINGS];
> 
> Note for future janitorial work: let's coalesce all the per-ring
> information into the ring error struct.
> 
> >  	u32 *active_bo_count, *pinned_bo_count;
> 
> For instance, I thought active_bo was already being tracked per-ring.
> (Pinned bo is global since that exists more or less to make sure that
> our registers are pointing into pinned objects.)
> 
> Do we also want to capture?
>   GAC_ECO_BITS /* gen6,7 */
>   GAM_ECOCHK /* gen6,7 */
>   GAB_CTL /* gen6 */
>   GFX_MODE /* gen6 */
> 
> The rest looks good.
> -Chris
> 

I agree. I was pretty unhappy too with how we've done things, but as
this information is immediately useful, I'd really like to not postpone.
Does "The rest looks good." mean reviewed-by?

-- 
Ben Widawsky, Intel Open Source Technology Center