[Intel-gfx] [PATCH 14/28] drm/i915: WaDisableRHWOOptimizationForRenderHang isn't applicable to HSW

Rodrigo Vivi rodrigo.vivi at gmail.com
Tue Jan 28 13:21:24 CET 2014


Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>

On Wed, Jan 22, 2014 at 5:32 PM,  <ville.syrjala at linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Can't find WaDisableRHWOOptimizationForRenderHang listed for HSW.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 4 ----
>  1 file changed, 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d8381b5..f9c44d2 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4767,10 +4767,6 @@ static void haswell_init_clock_gating(struct drm_device *dev)
>          */
>         I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
>
> -       /* Apply the WaDisableRHWOOptimizationForRenderHang:hsw workaround. */
> -       I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
> -                  GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
> -
>         /* WaApplyL3ControlAndL3ChickenMode:hsw */
>         I915_WRITE(GEN7_L3CNTLREG1,
>                         GEN7_WA_FOR_GEN7_L3_CONTROL);
> --
> 1.8.3.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br



More information about the Intel-gfx mailing list