[Intel-gfx] [PATCH 0/9] Broadwel RC6 & RPS

[Ben Widawsky]

This patch series implements RC6 and RPS for Broadwell. Most of the work
had already been done with the initial merge of Broadwell support,
however, there were a couple of missed things, and enough stuff had
moved around. The big change is the addition of the interrupt handlers.

I am mostly interested in getting RC6 working. RC6 enabling is critical
to getting other teams up and running. I decided to table RPS as well
because the code isn't quite as isolated as I would like, and the work
didn't seem that difficult.

IMPORTANT NOTE: With the current patch series, I do see rc6 residency
(not tested rps very much) however, the very first batch always GPU
hangs. At this point I have no evidence to lead me to believe it's
anything but a software bug on my part, but I've yet to track it down.
After this first hang, everything /seems/ stable, again, in limited
testing.

Again, my primary goal of getting this out now is allowing other teams
who are doing power work to move ahead, and also get some of the trivial
fixes moved ahead now. If I had to guess, I'm betting "Implement a basic
PM interrupt handler" might cause some fuss. If we can get the patches
reviewed, retested, and merged - that would be great.

I have pushed this to my fdo bdw-rc6 branch again with the hope that
relevant parties may use the patch series for testing. This branch is
based upon the latest available nightly, with 2 workarounds from Ken.

git://people.freedesktop.org/~bwidawsk/drm-intel bdw-rc6

A quick summary:
1-4 Are cleanups
5 is a cleanup + bug fix
6-7 are small bug fixes
8 handler for all of the PM interrupts
9 is the simple "on switch"

Ben Widawsky (9):
  drm/i915: Clarify RC6 enabling
  drm/i915: Stop pretending VLV has rc6+
  drm/i915: Just print rc6 facts
  drm/i915/bdw: Use centralized rc6 info print
  drm/i915/bdw: Extract rp_state_caps logic
  drm/i915/bdw: Set initial rps freq to nominal
  drm/i915/bdw: RPS frequency bits are the same as HSW
  drm/i915/bdw: Implement a basic PM interrupt handler
  drm/i915/bdw: Enable RC6

 drivers/gpu/drm/i915/i915_irq.c  | 80 +++++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/i915_reg.h  |  1 +
 drivers/gpu/drm/i915/intel_drv.h |  2 +
 drivers/gpu/drm/i915/intel_pm.c  | 91 +++++++++++++++++++++++++++-------------
 4 files changed, 141 insertions(+), 33 deletions(-)

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1.8.5.3