[Intel-gfx] [PATCH 27/28] drm/i915: Clarify WaDisable4x2SubspanOptimization situation for VLV

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>

On Wed, Jan 22, 2014 at 5:33 PM,  <ville.syrjala at linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> WaDisable4x2SubspanOptimization isn't listed for VLV in the workaround
> database, but BSpec says that the relevant bit must be set. Add a
> comment to remind people of this.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d95a3a6..ca87ea9 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4932,6 +4932,10 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
>
>         I915_WRITE(MI_ARB_VLV, MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);
>
> +       /*
> +        * BSpec says this must be set, even though
> +        * WaDisable4x2SubspanOptimization isn't listed for VLV.
> +        */
>         I915_WRITE(CACHE_MODE_1,
>                    _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));
>
> --
> 1.8.3.2
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br