[Intel-gfx] [PATCH 0/7] Enable RP1/RPn/RP0 sysfs and enable CHV PM interrupt

[deepak.s at linux.intel.com]

From: Deepak S <deepak.s at linux.intel.com>

Enable RP1/RPn/RP0 sysfs and enable CHV PM interrupt for verifying the freq on VLV and CHV

Deepak S (7):
  drm/i915: Read guaranteed freq for valleyview
  drm/i915: Add RP0/RP1/RPn render P state thresholds in VLV sysfs
  drm/i915: keep freq/opcode conversion function more generic
  drm/i915: populate mem_freq/cz_clock for chv
  drm/i915: CHV GPU frequency to opcode functions
  drm/i915/chv: Add basic PM interrupt support for CHV
  drm/i915: Add RP1 render P state thresholds in CHV

 drivers/gpu/drm/i915/i915_debugfs.c |  14 +--
 drivers/gpu/drm/i915/i915_drv.h     |   5 +-
 drivers/gpu/drm/i915/i915_irq.c     |   2 +-
 drivers/gpu/drm/i915/i915_reg.h     |   6 ++
 drivers/gpu/drm/i915/i915_sysfs.c   |  30 +++++--
 drivers/gpu/drm/i915/intel_pm.c     | 164 +++++++++++++++++++++++++++++++++---
 6 files changed, 189 insertions(+), 32 deletions(-)

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1.9.1