[Intel-gfx] [RFC 1/1] drm/i915: Power gating display wells during i915_pm_suspend

[Daniel Vetter]

On Fri, Jul 11, 2014 at 08:48:43PM +0530, sagar.a.kamble at intel.com wrote:
> From: Borun Fu <borun.fu at intel.com>
> 
> On VLV, after i915_pm_suspend display power wells are staying
> power ungated. So, after initiating mem sleep "echo mem > /sys/power/state"
> Display is staing D0 State. There might be better way/place to power gate
> these wells. Also, we need to make sure that if wells are power gated due to
> DPMS OFF sequence, they need not be turned off by i915_pm_suspend again.
> 
> Cc: Imre Deak <imre.deak at intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
> Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> Cc: Jani Nikula <jani.nikula at linux.intel.com>
> Change-Id: I34c80da66aa24c423a5576c68aa1f3a8d0f43848
> Signed-off-by: Sagar Kamble <sagar.a.kamble at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c      | 11 +++++++++++
>  drivers/gpu/drm/i915/i915_drv.h      |  4 ++++
>  drivers/gpu/drm/i915/intel_display.c |  4 ----
>  3 files changed, 15 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 83cb43a..a83a48e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -491,6 +491,9 @@ static int i915_drm_freeze(struct drm_device *dev)
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct drm_crtc *crtc;
>  	pci_power_t opregion_target_state;
> +	struct intel_crtc *intel_crtc;
> +	enum intel_display_power_domain domain;
> +	unsigned long domains;
>  
>  	/* ignore lid events during suspend */
>  	mutex_lock(&dev_priv->modeset_restore_lock);
> @@ -529,6 +532,14 @@ static int i915_drm_freeze(struct drm_device *dev)
>  		drm_modeset_lock_all(dev);
>  		for_each_crtc(dev, crtc) {
>  			dev_priv->display.crtc_disable(crtc);
> +
> +			intel_crtc = to_intel_crtc(crtc);
> +			if (!HAS_DDI(dev)) {

The HAS_DDI check is no longer required, just merged the patch for that.
And I think we should extract an intel_crtc_disable helper to share it
with the dpms off code.
-Daniel

> +				domains = intel_crtc->enabled_power_domains;
> +				for_each_power_domain(domain, domains)
> +					intel_display_power_put(dev_priv, domain);
> +				intel_crtc->enabled_power_domains = 0;


> +			}
>  		}
>  		drm_modeset_unlock_all(dev);
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 47c8ec1..1d75007 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -179,6 +179,10 @@ enum hpd_pin {
>  	list_for_each_entry((intel_connector), &(dev)->mode_config.connector_list, base.head) \
>  		if ((intel_connector)->base.encoder == (__encoder))
>  
> +#define for_each_power_domain(domain, mask)				\
> +	for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++)	\
> +		if ((1 << (domain)) & (mask))
> +
>  struct drm_i915_private;
>  struct i915_mmu_object;
>  
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 72abc0b..b29d417 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4300,10 +4300,6 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
>  	I915_WRITE(BCLRPAT(crtc->pipe), 0);
>  }
>  
> -#define for_each_power_domain(domain, mask)				\
> -	for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++)	\
> -		if ((1 << (domain)) & (mask))
> -
>  enum intel_display_power_domain
>  intel_display_port_power_domain(struct intel_encoder *intel_encoder)
>  {
> -- 
> 1.8.5
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch