[Intel-gfx] [PATCH 00/42] Execlists v4
Volkin, Bradley D
bradley.d.volkin at intel.com
Fri Jul 11 19:26:04 CEST 2014
On Fri, Jul 11, 2014 at 08:48:52AM -0700, oscar.mateo at intel.com wrote:
> From: Oscar Mateo <oscar.mateo at intel.com>
>
> For a description of this patchset, please check the previous cover letters: [1], [2] and [3].
>
> The main changes introduced in this v4 are:
>
> - Do not abstract __i915_add_request away.
> - Squash together the two emit request functions.
> - Always pass the ringbuffer along, as the struct that hold together all required information.
> - Integrate help into DocBook.
> - Early sanitize for i915.execlists (and remove lrc_enabled).
> - Always defer the context creation: do not special case the context create ioctl.
> - Do not special case the reset_ring_cleanup, do INIT_LIST_HEAD.
> - Add TODO to error capture code.
> - "use_mmio_flip at driver discretion" means "always" with Execlists.
> - Lock before displaying execlists info in debugfs.
> - Ehen populating the context, use _MASKED_BIT_ENABLE, upper/lower_32_bits, etc...
> - Add comment about CHV when populating the context.
> - Replace submit_ctx vfunc with a plain function call.
> - Do not change the behaviour of pipe control fini.
> - The BSD invalidate bit still exists in GEN8.
> - Squash intel_runtime_pm_get fix.
> - Pin rinbuffer and context backing objects only on-demand.
> - Reorder and rewrite to explain patches instead of showcasing them.
> - Reorder and rewrite to split "chapters" as cleanly as possible.
>
> The patches in this series can be split into "chapters". They are:
>
> - Logical Ring Contexts: patches 1 to 11
> - Logical Rings: patches 12 to 26
> - Execlists: patches 27 to 35
> - Debug, documentation and enabling: patches 36 to 40
> - Last minute patches that still require more attention: patches 41 and 42
>
> Unfortunately, in a last-minute run of the IGT testsuite, I have noticed problems in gem_evict_everything. It's still not clear I can continue working on this project come next Monday, so I have decided to send the series to the mailing list "as-is", even though this potential eviction problem still needs to be chased. The last two patches (regarding on-demand pining of backing objects) also require a deep review and probably some more work, but I was running out of time.
>
> One other caveat I have noticed is that many WAs in gen8_init_clock_gating (those that affect registers that now exist per-context) can get lost in the render default context. The reason is, in Execlists, a context is saved as soon as head = tail (with MI_SET_CONTEXT, however, the context wouldn't be saved until you tried to restore a different context). As we are sending the golden state batchbuffer to the render ring as soon as the rings are initialized, we are effectively saving the default context before gen8_init_clock_gating has an opportunity to set the WAs. I haven't noticed any ill-effect from this (yet) but it would be a good idea to move the WAs somewhere else (ring init looks like a good place). I believe there is already work in progress to create a new WA architecture, so this can be tackled there.
Acked-by: Brad Volkin <bradley.d.volkin at intel.com>
I was on the hook to do detailed review for this but I won't have time for that
before my vacation and don't want to delay it. From a high-level pass, it looks
like all of my previous feedback was addressed and the new ordering looks good
as well. So from that perspective, I think we're ready to merge the bulk of
this series. Thanks for all the work on this Oscar!
Brad
>
> The previous IGT test [4] still applies.
>
> [1]
> http://lists.freedesktop.org/archives/intel-gfx/2014-March/042563.html
> [2]
> http://lists.freedesktop.org/archives/intel-gfx/2014-May/044847.html
> [3]
> http://lists.freedesktop.org/archives/intel-gfx/2014-June/047138.html
> [4]
> http://lists.freedesktop.org/archives/intel-gfx/2014-May/044846.html
>
> Ben Widawsky (2):
> drm/i915/bdw: Implement context switching (somewhat)
> drm/i915/bdw: Print context state in debugfs
>
> Michel Thierry (1):
> drm/i915/bdw: Two-stage execlist submit process
>
> Oscar Mateo (38):
> drm/i915/bdw: New source and header file for LRs, LRCs and Execlists
> drm/i915/bdw: Macro for LRCs and module option for Execlists
> drm/i915/bdw: Initialization for Logical Ring Contexts
> drm/i915/bdw: Introduce one context backing object per engine
> drm/i915/bdw: A bit more advanced LR context alloc/free
> drm/i915/bdw: Allocate ringbuffers for Logical Ring Contexts
> drm/i915/bdw: Add a context and an engine pointers to the ringbuffer
> drm/i915/bdw: Populate LR contexts (somewhat)
> drm/i915/bdw: Deferred creation of user-created LRCs
> drm/i915/bdw: Render moot context reset and switch with Execlists
> drm/i915/bdw: Don't write PDP in the legacy way when using LRCs
> drm/i915: Abstract the legacy workload submission mechanism away
> drm/i915/bdw: Skeleton for the new logical rings submission path
> drm/i915/bdw: Generic logical ring init and cleanup
> drm/i915/bdw: GEN-specific logical ring init
> drm/i915/bdw: GEN-specific logical ring set/get seqno
> drm/i915/bdw: New logical ring submission mechanism
> drm/i915/bdw: GEN-specific logical ring emit request
> drm/i915/bdw: GEN-specific logical ring emit flush
> drm/i915/bdw: Emission of requests with logical rings
> drm/i915/bdw: Ring idle and stop with logical rings
> drm/i915/bdw: Interrupts with logical rings
> drm/i915/bdw: GEN-specific logical ring emit batchbuffer start
> drm/i915/bdw: Workload submission mechanism for Execlists
> drm/i915/bdw: Always use MMIO flips with Execlists
> drm/i915/bdw: Render state init for Execlists
> drm/i915/bdw: Write the tail pointer, LRC style
> drm/i915/bdw: Avoid non-lite-restore preemptions
> drm/i915/bdw: Help out the ctx switch interrupt handler
> drm/i915/bdw: Make sure gpu reset still works with Execlists
> drm/i915/bdw: Make sure error capture keeps working with Execlists
> drm/i915/bdw: Disable semaphores for Execlists
> drm/i915/bdw: Display execlists info in debugfs
> drm/i915/bdw: Display context backing obj & ringbuffer info in debugfs
> drm/i915/bdw: Document Logical Rings, LR contexts and Execlists
> drm/i915/bdw: Enable Logical Ring Contexts (hence, Execlists)
> drm/i915/bdw: Pin the context backing objects to GGTT on-demand
> drm/i915/bdw: Pin the ringbuffer backing object to GGTT on-demand
>
> Thomas Daniel (1):
> drm/i915/bdw: Handle context switch events
>
> Documentation/DocBook/drm.tmpl | 5 +
> drivers/gpu/drm/i915/Makefile | 1 +
> drivers/gpu/drm/i915/i915_debugfs.c | 150 ++-
> drivers/gpu/drm/i915/i915_drv.c | 4 +
> drivers/gpu/drm/i915/i915_drv.h | 46 +-
> drivers/gpu/drm/i915/i915_gem.c | 106 +-
> drivers/gpu/drm/i915/i915_gem_context.c | 56 +-
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 32 +-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +
> drivers/gpu/drm/i915/i915_gem_render_state.c | 40 +-
> drivers/gpu/drm/i915/i915_gem_render_state.h | 47 +
> drivers/gpu/drm/i915/i915_gpu_error.c | 22 +-
> drivers/gpu/drm/i915/i915_irq.c | 44 +-
> drivers/gpu/drm/i915/i915_params.c | 6 +
> drivers/gpu/drm/i915/i915_reg.h | 5 +
> drivers/gpu/drm/i915/intel_display.c | 2 +
> drivers/gpu/drm/i915/intel_lrc.c | 1829 ++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_lrc.h | 113 ++
> drivers/gpu/drm/i915/intel_renderstate.h | 8 +-
> drivers/gpu/drm/i915/intel_ringbuffer.c | 166 ++-
> drivers/gpu/drm/i915/intel_ringbuffer.h | 42 +-
> 21 files changed, 2574 insertions(+), 155 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/i915_gem_render_state.h
> create mode 100644 drivers/gpu/drm/i915/intel_lrc.c
> create mode 100644 drivers/gpu/drm/i915/intel_lrc.h
>
> --
> 1.9.0
>
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