[Intel-gfx] [PATCH 11/11] CHROMIUM: drm/i915/vlv: Prefer VBT to set PWM

[clinton.a.taylor at intel.com]

From: Ben Widawsky <benjamin.widawsky at intel.com>

This patch enables the VBT to override the PWM left in the BLC register,
or correct for VBIOS which doesn't program the BLC, with a VBT entry.

It kills the long hardcoded VLV_DEFAULT_BACKLIGHT_MOD_FREQ

As of the last patch, we always will have a default VBT value provided
in intel_bios.c

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
Signed-off-by: Wayne Boyer <wayne.boyer at intel.com>

Change-Id: I4116d5fa21706e9e9ac85e41c43f7443964a822b
Reviewed-on: https://chromium-review.googlesource.com/196608
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Tested-by: Wayne Boyer <wayne.boyer at intel.com>
Commit-Queue: Wayne Boyer <wayne.boyer at intel.com>

Conflicts:
	drivers/gpu/drm/i915/intel_panel.c
---
 drivers/gpu/drm/i915/intel_bios.h  |   16 ----------------
 drivers/gpu/drm/i915/intel_panel.c |   30 ++++++++++++++++++++----------
 2 files changed, 20 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 62cd658..b986677 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -408,22 +408,6 @@ struct bdb_lfp_backlight_data {
 	u8 level[16];
 } __packed;
 
-struct bdb_lfp_backlight_data_entry {
-	u8 type:2;
-	u8 active_low_pwm:1;
-	u8 obsolete1:5;
-	u16 pwm_freq_hz;
-	u8 min_brightness;
-	u8 obsolete2;
-	u8 obsolete3;
-} __packed;
-
-struct bdb_lfp_backlight_data {
-	u8 entry_size;
-	struct bdb_lfp_backlight_data_entry data[16];
-	u8 level[16];
-} __packed;
-
 struct aimdb_header {
 	char signature[16];
 	char oem_device[20];
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 02248a5..5270a08 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -418,6 +418,14 @@ static u32 intel_panel_compute_brightness(struct intel_connector *connector,
 	return val;
 }
 
+static u16 __vlv_calculate_mod_freq(u16 hz, bool s0ix)
+{
+	if (!s0ix)
+		return 100000000 / (128 * hz);
+	else
+		return 25000000 / (16 * hz);
+}
+
 static u32 bdw_get_backlight(struct intel_connector *connector)
 {
 	struct drm_device *dev = connector->base.dev;
@@ -567,7 +575,6 @@ void intel_panel_set_backlight(struct intel_connector *connector, u32 level,
 	enum pipe pipe = intel_get_pipe_from_connector(connector);
 	u32 freq;
 	unsigned long flags;
-	u64 n;
 
 	if (!panel->backlight.present || pipe == INVALID_PIPE)
 		return;
@@ -1093,21 +1100,24 @@ static int vlv_setup_backlight(struct intel_connector *connector)
 	for_each_pipe(pipe) {
 		u32 duty = I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
 		u32 freq = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
+		u32 vbt_val = __vlv_calculate_mod_freq(dev_priv->vbt.backlight.pwm_freq_hz, true);
 
 		if (freq) {
-			/* Skip if the modulation freq is already set */
-			continue;
-		}
-
-		if (WARN_ON(pipe == PIPE_A)) {
-			/* Assume BLC for pipe A is the default. Therefore, A
-			 * must be non-zero. */
-			freq = (VLV_DEFAULT_BACKLIGHT_MOD_FREQ << 16);
+			if (vbt_val != freq >> 16) {
+				DRM_DEBUG_KMS("reg doesn't match VBT value 0x%x != 0x%x\n",
+					      freq >> 16, vbt_val);
+				freq = vbt_val << 16;
+			} else
+				continue;
+		} else if (WARN_ON(pipe == PIPE_A)) {
+			/* VLV will always have a vbt value, fake or other.  */
+			BUG_ON(IS_VALLEYVIEW(dev) && !vbt_val);
+			freq = vbt_val << 16;
 		} else
 			freq = I915_READ(VLV_BLC_PWM_CTL(PIPE_A)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 
 		if (WARN_ON(freq == 0))
-			freq = (VLV_DEFAULT_BACKLIGHT_MOD_FREQ << 16);
+			freq = vbt_val << 16;
 		I915_WRITE(VLV_BLC_PWM_CTL(pipe), freq | duty);
 	}
 
-- 
1.7.9.5