[Intel-gfx] [PATCH v2 2/2] drm/i915: fix VDD state tracking after system resume
Daniel Vetter
daniel at ffwll.ch
Wed Jul 30 15:41:07 CEST 2014
On Wed, Jul 30, 2014 at 03:57:32PM +0300, Imre Deak wrote:
> Just like during booting the BIOS can leave the VDD bit enabled after
> system resume. So apply the same state sanitization there too. This
> fixes a problem where after resume the port power domain refcount gets
> unbalanced.
>
> Reported-and-tested-by: Jarkko Nikula <jarkko.nikula at linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 1edfd1a..fdb5657 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12977,6 +12977,12 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
> /* HW state is read out, now we need to sanitize this mess. */
> list_for_each_entry(encoder, &dev->mode_config.encoder_list,
> base.head) {
> + /*
> + * Do the following only during resume, since at driver
> + * loading it's done early when initializing the encoder.
> + */
> + if (force_restore)
> + intel_edp_panel_vdd_sanitize(encoder);
This should be put into an encoder->reset callback.
-Daniel
> intel_sanitize_encoder(encoder);
> }
>
> --
> 1.8.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
More information about the Intel-gfx
mailing list