[Intel-gfx] [PATCH 2/3] drm/i915: Change Mipi register definitions

[Damien Lespiau]

On Sun, Jun 01, 2014 at 07:24:47PM +0530, Shashank Sharma wrote:
>  
>  /* XXX: all bits reserved */
> -#define _MIPIA_AUTOPWG				(VLV_DISPLAY_BASE + 0x611a0)
> +#define _MIPIA_AUTOPWG			(dev_priv->mipi_mmio_base + 0x611a0)

This one isn't part of the MIPI block address space IIUC, so we
shouldn't express it as mipi_mmio_base + offset. Let's leave
VLV_DISPLAY_BASE there.

> -#define _MIPIB_READ_DATA_VALID			(VLV_DISPLAY_BASE + 0xb938)
> +#define _MIPIA_READ_DATA_VALID		(dev_priv->mipi_mmio_base + 0xb138)
> +#define _MIPIB_READ_DATA_VALID		(dev_priv->mipi_mmio_base + 0xb938)
>  #define MIPI_READ_DATA_VALID(pipe)	_PIPE(pipe, _MIPIA_READ_DATA_VALID, _MIPIB_READ_DATA_VALID)
>  #define  READ_DATA_VALID(n)				(1 << (n))
>  
> +
>  /* For UMS only (deprecated): */

That's an extra line here. Details, sure, but that's the rigour expected
from submissions.

HTH,

-- 
Damien