[Intel-gfx] [Intel 945] BSM: How to determine size of DRAM used for internal graphics?

[Paul Menzel]

Dear Intel graphics folks,


Am Freitag, den 30.05.2014, 14:47 +0200 schrieb Paul Menzel:

> Am Freitag, den 30.05.2014, 13:45 +0200 schrieb Paul Menzel:
> 
> > since commit 17fec8a0 [1]
> > 
> >         drm/i915: Use Graphics Base of Stolen Memory on all gen3+
> > 
> > Linux reads the register BSM (Base of Stolen Memory) directly to get the
> > base address of graphics stolen memory. With coreboot [2] and native
> > graphics init – note that everything works with the proprietary VGA
> > BIOS/Option ROM – this causes a regression [3] as this register is not
> > programmed at all.
> > 
> > From the datasheet *Mobile Intel® 945 Express Chipset Family* [4] the
> > register BSM is described on page 290.
> > 
> >         Graphics Stolen Memory and TSEG are within DRAM space defined
> >         under TOLUD. From the top of low used DRAM, (G)MCH claims 1 to
> >         64 MBs of DRAM for internal graphics if enabled.
> > 
> >         This register contains bits 31 to 20 of the base address of
> >         stolen
> >         DRAM memory. The host interface determines the base of
> >         graphics stolen memory by subtracting the graphics stolen
> >         memory size from TOLUD. See Device 0 TOLUD for more
> >         explanations.
> > 
> > Also see Figure 12 *Main Memory Address Range* in section 9.2 on page
> > 325.
> > 
> > Unfortunately I am unable to find out how the graphics stolen memory
> > size is determined. I’d have thought it is used for the framebuffer, but
> > according to page 93 (Graphics Mode select (GMS)) that the framebuffer
> > size can only be 1 MB or 8 MB, which contradicts that it can be up to 64
> > MB.
> > 
> > If it is determined implicitly by the value I set the BSM to, where can
> > I find the recommendations what size to use? I’d guess it is dependent
> > on the RAM size, that means dependent if the system has 512 MB or 4 GB
> > for example.
> 
> The datasheet documents the bits of the register BSM as Read Only (RO).
> So I am even more confused now.

It turned out that the register is indeed read-only and that the
register to look at seems to be PGTBL_CTL/PGETBL_CTL.


Thanks,

Paul


> > [1] https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=17fec8a08698bcab98788e1e89f5b8e7502ababd
> > [2] http://www.coreboot.org/
> > [3] https://bugs.freedesktop.org/show_bug.cgi?id=79038
> > [4] http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/mobile-945-express-chipset-datasheet.pdf
> >     Document Number: 309219-006
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