[Intel-gfx] [PATCH] drm/i915: Avoid div-by-zero when pixel_multiplier is zero

Daniel Vetter daniel at ffwll.ch
Tue Jun 10 09:12:03 CEST 2014


On Mon, Jun 09, 2014 at 04:20:46PM +0300, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> On certain platforms pixel_multiplier is read out in
> .get_pipe_config(), but it also gets used to calculate the
> pixel clock in intel_sdvo_get_config(). If the pipe is disable
> but some SDVO outputs are active, we may end up dividing by zero
> in intel_sdvo_get_config().
> 
> To avoid the problem simply check for zero pixel_multiplier and skip
> the division. Another attempt at fixing this involved populating
> pixel_multiplier to 1 even for disabled pipes, but that triggered a
> WARN because SDVO_CMD_GET_CLOCK_RATE_MULT command failed and thus
> encoder_pixel_multiplier was left at zero and didn't match
> pipe_config->pixel_multiplier.
> 
> The "divide by pixel_multiplier" operation got introduced here:
>  commit 18442d08786472c63a0a80c27f92b033dffc26de
>  Author: Ville Syrjälä <ville.syrjala at linux.intel.com>
>  Date:   Fri Sep 13 16:00:08 2013 +0300
> 
>     drm/i915: Fix port_clock and adjusted_mode.clock readout all over
> 
> and it has caused a regression on certain machines since they would
> hit the div-by-zero during resume.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76520
> Cc: <stable at vger.kernel.org> # 3.13+
> Tested-by: Tim Richardson <tim at tim-richardson.net>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>

> ---
>  drivers/gpu/drm/i915/intel_sdvo.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
> index 6a4d5bc..20375cc 100644
> --- a/drivers/gpu/drm/i915/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/intel_sdvo.c
> @@ -1385,7 +1385,9 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
>  			 >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
>  	}
>  
> -	dotclock = pipe_config->port_clock / pipe_config->pixel_multiplier;
> +	dotclock = pipe_config->port_clock;
> +	if (pipe_config->pixel_multiplier)
> +		dotclock /= pipe_config->pixel_multiplier;
>  
>  	if (HAS_PCH_SPLIT(dev))
>  		ironlake_check_encoder_dotclock(pipe_config, dotclock);
> -- 
> 1.8.5.5
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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