[Intel-gfx] [PATCH 40/50] drm/i915/bdw: Handle context switch events

[Mateo Lozano, Oscar]

> -----Original Message-----
> From: Daniel Vetter [mailto:daniel.vetter at ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 11, 2014 12:52 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx at lists.freedesktop.org; Daniel, Thomas
> Subject: Re: [Intel-gfx] [PATCH 40/50] drm/i915/bdw: Handle context switch
> events
> 
> On Fri, May 09, 2014 at 01:09:10PM +0100, oscar.mateo at intel.com wrote:
> > From: Thomas Daniel <thomas.daniel at intel.com>
> >
> > Handle all context status events in the context status buffer on every
> > context switch interrupt. We only remove work from the execlist queue
> > after a context status buffer reports that it has completed and we
> > only attempt to schedule new contexts on interrupt when a previously
> > submitted context completes (unless no contexts are queued, which
> > means the GPU is free).
> >
> > Signed-off-by: Thomas Daniel <thomas.daniel at intel.com>
> >
> > v2: Unreferencing the context when we are freeing the request might
> > free the backing bo, which requires the struct_mutex to be grabbed, so
> > defer unreferencing and freeing to a bottom half.
> >
> > v3:
> > - Ack the interrupt inmediately, before trying to handle it (fix for
> > missing interrupts by Bob Beckett <robert.beckett at intel.com>).
> 
> This interrupt handling change is interesting since it might explain our irq
> handling woes on gen5+ with the two-level GT interrupt handling scheme.
> Can you please roll this out as a prep patch for all the existing gt interrupt
> sources we handle already for gen5+?
> 
> Thanks, Daniel

Can do.