[Intel-gfx] [PATCH] drm/i915/bdw: remove erroneous chv specific workarounds from bdw code

[Jani Nikula]

On Fri, 13 Jun 2014, Jani Nikula <jani.nikula at intel.com> wrote:
> From: Tom O'Rourke <Tom.O'Rourke at intel.com>
>
> Correct a merge mishap in
>
> commit e4443e459ccf43f2c139358400365fd6a839d40d
> Author: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Date:   Wed Apr 9 13:28:41 2014 +0300
>
>     drm/i915/chv: Add a bunch of pre production workarounds
>
> Remove the the chv specific workarounds from bdw code, specifically
> gen8_enable_rps().
>
> Signed-off-by: Tom O'Rourke <Tom.O'Rourke at intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> [Jani: extract hunk #1 for 3.16 from Tom's patch, clarify commit message]
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
>
> ---
>
> All, I intend to push this to drm-intel-fixes, any objections?

And pushed with Daniel's IRC ack. Thanks everyone.

BR,
Jani.

>
> Jani.
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 6 +-----
>  1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 7e2db9abd810..769caea97c21 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3505,15 +3505,11 @@ static void gen8_enable_rps(struct drm_device *dev)
>  
>  	I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
>  
> -	/* WaDisablePwrmtrEvent:chv (pre-production hw) */
> -	I915_WRITE(0xA80C, I915_READ(0xA80C) & 0x00ffffff);
> -	I915_WRITE(0xA810, I915_READ(0xA810) & 0xffffff00);
> -
>  	/* 5: Enable RPS */
>  	I915_WRITE(GEN6_RP_CONTROL,
>  		   GEN6_RP_MEDIA_TURBO |
>  		   GEN6_RP_MEDIA_HW_NORMAL_MODE |
> -		   GEN6_RP_MEDIA_IS_GFX | /* WaSetMaskForGfxBusyness:chv (pre-production hw ?) */
> +		   GEN6_RP_MEDIA_IS_GFX |
>  		   GEN6_RP_ENABLE |
>  		   GEN6_RP_UP_BUSY_AVG |
>  		   GEN6_RP_DOWN_IDLE_AVG);
> -- 
> 1.9.1
>
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-- 
Jani Nikula, Intel Open Source Technology Center