[Intel-gfx] [PATCH] drm/i915: Attach a PSR property on eDP
Chris Wilson
chris at chris-wilson.co.uk
Mon Jun 16 09:28:33 CEST 2014
Let userspace know the status of Panel Self-Refresh by virtue of a
property on the appropriate connector.
v2: Only attach the property if the driver is capable of PSR.
v3: Add docbook courtesy of Damien.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Damien Lespiau <damien.lespiau at intel.com>
---
Documentation/DocBook/drm.tmpl | 10 +++++++++-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_dp.c | 13 +++++++++++++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_modes.c | 29 +++++++++++++++++++++++++++++
5 files changed, 53 insertions(+), 1 deletion(-)
diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
index 7df3134ebc0e..e05841760c45 100644
--- a/Documentation/DocBook/drm.tmpl
+++ b/Documentation/DocBook/drm.tmpl
@@ -2648,7 +2648,7 @@ void intel_crt_init(struct drm_device *dev)
<td valign="top" >TBD</td>
</tr>
<tr>
- <td rowspan="21" valign="top" >i915</td>
+ <td rowspan="22" valign="top" >i915</td>
<td rowspan="3" valign="top" >Generic</td>
<td valign="top" >"Broadcast RGB"</td>
<td valign="top" >ENUM</td>
@@ -2799,6 +2799,14 @@ void intel_crt_init(struct drm_device *dev)
<td valign="top" >TBD</td>
</tr>
<tr>
+ <td valign="top" >eDP</td>
+ <td valign="top" >“Panel Self-Refresh”</td>
+ <td valign="top" >ENUM | IMMUTABLE</td>
+ <td valign="top" >{ "Unsupported", "Idle", "Active" }</td>
+ <td valign="top" >Connector</td>
+ <td valign="top" >Whether the eDP panel supports using self-refresh, which is a power saving mode for static displays as the panel is able to read from its own buffer rather than require the host to send the same frame on every vertical refresh, and whether it is idle or active</td>
+ </tr>
+ <tr>
<td rowspan="3" valign="top" >CDV gma-500</td>
<td rowspan="3" valign="top" >Generic</td>
<td valign="top" >"Broadcast RGB"</td>
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bdb419c48016..92561bdde201 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -642,6 +642,7 @@ struct i915_psr {
bool enabled;
bool active;
struct delayed_work work;
+ struct drm_property *property;
};
enum intel_pch {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index e3ad8a7c9fd0..51c0799ea83d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1820,6 +1820,12 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
return true;
}
+static void intel_edp_set_psr_property(struct intel_connector *connector, uint64_t val)
+{
+ drm_object_property_set_value(&connector->base.base,
+ to_i915(connector->base.dev)->psr.property, val);
+}
+
static void intel_edp_psr_do_enable(struct intel_dp *intel_dp)
{
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
@@ -1835,6 +1841,8 @@ static void intel_edp_psr_do_enable(struct intel_dp *intel_dp)
/* Enable PSR on the host */
intel_edp_psr_enable_source(intel_dp);
+ intel_edp_set_psr_property(intel_dp->attached_connector, 1);
+
dev_priv->psr.enabled = true;
dev_priv->psr.active = true;
}
@@ -1931,6 +1939,7 @@ void intel_edp_psr_inactivate(struct drm_device *dev)
intel_dp = enc_to_intel_dp(&encoder->base);
intel_crtc = to_intel_crtc(encoder->base.crtc);
+ intel_edp_set_psr_property(connector, 0);
dev_priv->psr.active = false;
I915_WRITE(EDP_PSR_CTL(dev), I915_READ(EDP_PSR_CTL(dev))
@@ -3349,6 +3358,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
dev_priv->psr.sink_support = true;
DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
}
+ intel_edp_set_psr_property(intel_dp->attached_connector,
+ dev_priv->psr.sink_support ? dev_priv->psr.active : -1);
}
/* Training Pattern 3 support */
@@ -3977,6 +3988,8 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect
intel_dp->color_range_auto = true;
if (is_edp(intel_dp)) {
+ if (HAS_PSR(connector->dev))
+ intel_attach_psr_property(connector);
drm_mode_create_scaling_mode_property(connector->dev);
drm_object_attach_property(
&connector->base,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index cfe140a74266..9c8524016e4b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -905,6 +905,7 @@ int intel_connector_update_modes(struct drm_connector *connector,
int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
void intel_attach_force_audio_property(struct drm_connector *connector);
void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
+void intel_attach_psr_property(struct drm_connector *connector);
/* intel_overlay.c */
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c
index 0e860f39933d..6c14c97fa8df 100644
--- a/drivers/gpu/drm/i915/intel_modes.c
+++ b/drivers/gpu/drm/i915/intel_modes.c
@@ -126,3 +126,32 @@ intel_attach_broadcast_rgb_property(struct drm_connector *connector)
drm_object_attach_property(&connector->base, prop, 0);
}
+
+static const struct drm_prop_enum_list psr_names[] = {
+ { -1, "Unsupported" },
+ { 0, "Idle" },
+ { 1, "Active" },
+};
+
+void
+intel_attach_psr_property(struct drm_connector *connector)
+{
+ struct drm_device *dev = connector->dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_property *prop;
+
+ prop = dev_priv->psr.property;
+ if (prop == NULL) {
+ prop = drm_property_create_enum(dev,
+ DRM_MODE_PROP_ENUM | DRM_MODE_PROP_IMMUTABLE,
+ "Panel Self-Refresh",
+ psr_names,
+ ARRAY_SIZE(psr_names));
+ if (prop == NULL)
+ return;
+
+ dev_priv->psr.property = prop;
+ }
+
+ drm_object_attach_property(&connector->base, prop, 0);
+}
--
2.0.0
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